LD7577JAGN 데이터 시트보기 (PDF) - Unspecified
부품명
상세내역
제조사
LD7577JAGN Datasheet PDF : 20 Pages
| |||
LD7577JA
VCC
OVP Level
OVP Tripped
UVLO(on)
UVLO(off)
t
OUT
Switching
Non-Switching
Fig. 19
Switching
t
Brownout Protection & Line voltage OVP
(Over voltage protection)
The LD7577JA is programmable to set the brownout
protection point and the line voltage OVP point though
BNO pin.
The voltage across the BNO pin is proportional to the bulk
capacitor voltage, referred as the line voltage. A
brownout comparator is implemented to detect the
abnormal line condition. As soon as the condition is
detected, it will shut down the controller to prevent the
damage. Figure 20 shows the operation. When VBNO
falls below 0.95V, the gate output will be kept off even Vcc
has already achieved UVLO(ON). It therefore makes Vcc
hiccup between UVLO(ON) and UVLO(OFF). Unless the
line voltage is large enough to pull VBNO larger than 1.05V,
the gate output will not start switching even when the next
UVLO(ON) is tripped. A hysteresis is implemented to
prevent the false trigger during turn-on and turn-off.
The comparator built in BNO will disable switching from
Gate-out as soon as it detects excessive high line voltage
and BNO voltage over 4.16V. VCC will then operate in
hiccup mode between UVLO-on and UVLO-off. The
Gate-out will not resume switching until VBNO falls below
3.92V. Therefore, it can prevent excessive high line
voltage from damaging the external components. Fig. 21
shows the operation.
In order to protect BNO pin from being damaged during
the dividing resistors floating, an internal zener diode is
implemented in BNO pin. Fig. 13 shows the sinking
capability of the zener diode. To protect BNO pin, the
current flowing in BNO pin must be below 1.5μA, as
shown in Fig. 13.
Line Voltage
t
VBNO
1.05V
0.95V
Vcc
UVLO(on)
UVLO(off)
OUT
AC OK area
t
t
Non-Switching
Switching
Non-
Switching
t
Fig. 20
Leadtrend Technology Corporation
LD7577JA-DS-00b August 2010
13
www.leadtrend.com.tw
Share Link: 