EVAL-ADV7194EB 데이터 시트보기 (PDF) - Analog Devices

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EVAL-ADV7194EB

Evaluation Board for the ADV7194 Digital Video Encoder

Analog Devices 

REGISTER SETTINGS ON POWER-UP AND

ON RESET

After pressing the reset button PB1 on the evaluation

board, the register settings of the ADV7194 will set up

as follows:

NTSC Video Standard.

2xOversampling Mode

DAC A, B, C off

DAC D, E, F on

Disabled:

MR2: Sleep Mode Control,- Pixel Data Valid,

Standard I2C, Square Pixel, SCART

MR3: Closed Captioning, TTX Bit Request,

Teletext, VBI

MR4: Color Bars, VSYNC_3H

MR5: CLAMP, RGB Sync, Y-Level Control

MR7: Sharpness Filter, Brightness Control, Hue

Adjust, Luma Saturation, Color Control

MR8: Gamma Control, DNR, Double Buffering,

Progressive Scan input, 10-Bit input

MR9: Undershoot Limiter

OCR:CLKOUT Pin

Enabled:

MR2: Pedestal,

MR4: Burst, Chrominance,

MR6: PLL, Power-Up Sleep Mode,

Eval-ADV7194EB

The following register settings will correspond to

the above settings:

MR0

MR1

MR2

MR3

MR4

MR5

MR6

MR7

MR8

MR9

OCR

TR0

TR1

SFR0

SFR1

SFR2

SFR3

SPR

00hex

07hex

08hex

00hex

00hex

00hex

00hex

00hex

00hex

00hex

72hex

08hex

00hex

CBhex

8Ahex

09hex

2Ahex

00hex

all other registers : 00hex

After powering up the ADV7194EB a hardware reset

should be applied (PB1).

Output Configuration:

DAC A: G

DAC B: B

DAC C: R

DAC D: CVBS

DAC E: LUMA

DAC F: CHROMA

Timing Mode 0, Slave, Blank Disabled

Interlaced Mode, 720 active pixel line duration,

normal operating mode (no genlock), UV default

levels, TTX input, HSO Out, 8-bit Pixel Port,

no Chroma Delay

Subcarrier Frequency Register 0: CB

Subcarrier Frequency Register 1: 8A

Subcarrier Frequency Register 2: 09

Subcarrier Frequency Register 3: 2A

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