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NCP1010ST130T3G(2010) 데이터 시트보기 (PDF) - ON Semiconductor

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NCP1010ST130T3G Datasheet PDF : 24 Pages
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NCP1010, NCP1011, NCP1012, NCP1013, NCP1014
Full Latching Shutdown
Other applications require a full latching shutdown, e.g.
when an abnormal situation is detected (overtemperature
or overvoltage). This feature can easily be implemented
through two external transistors wired as a discrete SCR.
When the OVP level exceeds the Zener breakdown
OVP
Rhold
12 k
10 k
BAT54
voltage, the NPN biases the PNP and fires the equivalent
SCR, permanently bringing down the FB pin. The
switching pulses are disabled until the user unplugs the
power supply.
1
8
2
7
3
4
5
Drain
10 k
+
CVcc
Figure 24. Two Bipolars Ensure a Total Latch--Off of the SMPS in Presence of an OVP
Rhold ensures that the SCR stays on when fired. The bias
current flowing through Rhold should be small enough to let
the VCC ramp up (8.5 V) and down (7.5 V) when the SCR
is fired. The NPN base can also receive a signal from a
temperature sensor. Typical bipolars can be MMBT2222
and MMBT2907 for the discrete latch. The MMBT3946
features two bipolars NPN+PNP in the same package and
could also be used.
Power Dissipation and Heatsinking
The NCP101X welcomes two dissipating terms, the DSS
current--source (when active) and the MOSFET. Thus,
Ptot = PDSS + PMOSFET. When the PDIP--7 package is
surrounded by copper, it becomes possible to drop its
thermal resistance junction--to--ambient, RθJA down
to 75C/W and thus dissipate more power. The
maximum power the device can thus evacuate is:
Pmax
=
TJmax
Tambmax
RθJA
(eq. 12) which gives around
1.0 W for an ambient of 50C. The losses inherent to the
MOSFET RDSon can be evaluated using the following
formula:
Pmos
=
1
3
·
Ip2
·
d
·
RDSon
(eq. 13) , where Ip
is the worse case peak current (at the lowest line input), d is
the converter operating duty--cycle and RDSon, the
MOSFET resistance for TJ = 100C. This formula is only
valid for Discontinuous Conduction Mode (DCM)
operation where the turn--on losses are null (the primary
current is zero when you restart the MOSFET). Figure 25
gives a possible layout to help drop the thermal resistance.
When measured on a 35 mm (1 oz) copper thickness PCB,
we obtained a thermal resistance of 75C/W.
Figure 25. A Possible PCB Arrangement to Reduce the Thermal Resistance Junction--to--Ambient
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