74F398 데이터 시트보기 (PDF) - Fairchild Semiconductor

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74F398

Quad 2-Port Register

Fairchild Semiconductor 

Logic Symbols

74F398

74F398

74F399

74F399

IEEE/IEC

Unit Loading/Fan Out

Pin Names

Description

S

CP

I0a–I0d

I1a–I1d

Qa–Qd

Qa–Qd

Common Select Input

Clock Pulse Input (Active Rising Edge)

Data Inputs from Source 0

Data Inputs from Source 1

Register True Outputs

Register Complementary Outputs (74F398)

U.L.

HIGH/LOW

1.0/1.0

1.0/1.0

1.0/1.0

1.0/1.0

50/33.3

50/33.3

Input IIH/IIL

Output IOH/IOL

20 µA/−0.6 mA

20 µA/−0.6 mA

20 µA/−0.6 mA

20 µA/−0.6 mA

−1 mA/20 mA

−1 mA/20 mA

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