74ALVT16373DL 데이터 시트보기 (PDF) - NXP Semiconductors.
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74ALVT16373DL Datasheet PDF : 16 Pages
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Nexperia
74ALVT16373
16-bit transparent D-type latch; 3-state
10 Dynamic characteristics
Table 7. Dynamic characteristics
At recommended operating conditions; Tamb = -40 °C to +85 °C; voltages are referenced to GND (ground = 0 V); for test
circuit see Figure 9.
Symbol Parameter
Conditions
Min
Typ[1]
Max Unit
VCC = 2.5 V ± 0.2 V
tPLH
LOW to HIGH propagation delay
nDn to nQn; see Figure 5
1.0
2.0
3.2 ns
tPHL
HIGH to LOW propagation delay
nDn to nQn; see Figure 5
1.0
2.4
4.2 ns
tPLH
LOW to HIGH propagation delay
nLE to nQn; see Figure 6
1.5
2.6
4.2 ns
tPHL
HIGH to LOW propagation delay
nLE to nQn; see Figure 6
1.5
2.8
4.5 ns
tPZH
OFF-state to HIGH propagation delay nOE to nQn; see Figure 7
2.0
3.5
5.5 ns
tPZL
OFF-state to LOW propagation delay
nOE to nQn; see Figure 7
1.5
2.6
4.7 ns
tPHZ
HIGH to OFF-state propagation delay nOE to nQn; see Figure 7
1.5
2.7
4.5 ns
tPLZ
LOW to OFF-state propagation delay
nOE to nQn; see Figure 7
1.0
2.0
3.5 ns
tsu(H)
set-up time HIGH
nDn to nLE; see Figure 8
0
-0.7
-
ns
tsu(L)
set-up time LOW
nDn to nLE; see Figure 8
1.5
0.2
-
ns
th(H)
hold time HIGH
nDn to nLE; see Figure 8
0.5
-0.2
-
ns
th(L)
hold time LOW
nDn to nLE; see Figure 8
1.5
0.7
-
ns
tWH
pulse width HIGH
nLE; see Figure 6
1.5
-
-
ns
VCC = 3.3 V ± 0.3 V
tPLH
LOW to HIGH propagation delay
nDn to nQn; see Figure 5
0.5
1.6
2.5 ns
tPHL
HIGH to LOW propagation delay
nDn to nQn; see Figure 5
0.5
1.8
2.9 ns
tPLH
LOW to HIGH propagation delay
nLE to nQn; see Figure 6
1.0
2.0
3.1 ns
tPHL
HIGH to LOW propagation delay
nLE to nQn; see Figure 6
1.0
2.3
3.3 ns
tPZH
OFF-state to HIGH propagation delay nOE to nQn; see Figure 7
1.5
2.3
4.0 ns
tPZL
OFF-state to LOW propagation delay
nOE to nQn; see Figure 7
1.0
1.9
3.1 ns
tPHZ
HIGH to OFF-state propagation delay nOE to nQn; see Figure 7
1.5
2.9
4.5 ns
tPLZ
LOW to OFF-state propagation delay
nOE to nQn; see Figure 7
1.5
2.3
3.7 ns
tsu(H)
set-up time HIGH
nDn to nLE; see Figure 8
0.5
-0.2
-
ns
tsu(L)
set-up time LOW
nDn to nLE; see Figure 8
0.8
0.2
-
ns
th(H)
hold time HIGH
nDn to nLE; see Figure 8
0.8
0
-
ns
th(L)
hold time LOW
nDn to nLE; see Figure 8
1.0
0.2
-
ns
tWH
pulse width HIGH
nLE; see Figure 6
1.5
-
-
ns
[1] All typical values for VCC = 2.5 V ± 0.2 V are measured at VCC = 2.5 V and Tamb = 25 °C.
All typical values for VCC = 3.3 V ± 0.3 V are measured at VCC = 3.3 V and Tamb = 25 °C.
74ALVT16373
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 2 February 2018
© Nexperia B.V. 2018. All rights reserved.
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