Q67006-A9146 데이터 시트보기 (PDF) - Siemens AG
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Q67006-A9146 Datasheet PDF : 13 Pages
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TLE 4268
Pin Configuration
(top view)
Figure 2
P-DSO-20-6
N.C. 1
N.C. 2
QRES 3
GND 4
GND 5
GND 6
GND 7
N.C. 8
DRES 9
SRES 10
20
19
18
17
16
15
14
13
12
11
AEP01540
N.C.
N.C.
VΙ
GND
GND
GND
GND
N.C.
VQ
W
Pin Definitions and Functions
Pin
Symbol Function
1, 2, 8, 13, N. C.
19, 20
Not connected.
3
QRES Reset output; the open collector output is connected to the
5-V output via an integrated resistor of 30 kΩ.
4 … 7,
GND
14 … 17
Ground
9
DRES Reset delay; connect a capacitor to ground for delay time
adjustment.
10
SRES Reset switching threshold; for setting the switching threshold,
output to ground with voltage divider. If this input is connected to
ground, the reset is triggered at an output voltage of 4.5 V.
11
W
Watchdog input; positive-edge-triggered input for monitoring a
microcontroller.
12
VQ
5-V output voltage; block to ground with 22-µF capacitor,
ESR < 3 Ω.
18
VI
Input voltage; block to ground directly on the IC with ceramic
capacitor.
Semiconductor Group
3
1998-11-01
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