A14100 데이터 시트보기 (PDF) - Actel Corporation

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A14100

Accelerator Series FPGAs - ACT™ 3 Family

Actel Corporation 

Accelerator Series FPGAs – ACT™ 3 Family

routing. Each output segment spans four channels (two above

and two below), except near the top and bottom of the array

where edge effects occur. LVTs contain either one or two

segments. An example of vertical routing tracks and

segments is shown in Figure 8.

MODULE ROW

TRACK

SEGMENT

HF

MODULE ROW

Figure 7 • Horizontal Routing Tracks and Segments

HCLK

CLK0

NVCC

SIGNAL

SIGNAL

(LHT)

|

|

|

|

|

|

|

SIGNAL

NVSS

CLK1

VERTICLE INPUT

SEGMENT

S-MODULE

VF

S-MODULE

LVTS

C-MODULE MODULE ROW

CHANNEL

XF

FF

C-MODULE

Figure 8 • Vertical Routing Tracks and Segments

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