PS396CAI 데이터 시트보기 (PDF) - Pericom Semiconductor Corporation
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PS396CAI Datasheet PDF : 10 Pages
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PS396
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Test Circuits and Timing Diagrams (continued)
+5V
+2.4V
EN
V+
A0
A1
A2
A3
GND
50Ω
NO1-NO16 +3V
COM
V–
300Ω
–5V
VOUT
35pF
+3V
Logic
50%
Input
0V
tR < 20ns
tF < 20ns
VOUT
80%
Switch
Output
0V
tOPEN
Figure 4. Break-Before-Make Interval
+5V
V+
NO1-NO16
+3V
Logic
Input
0V
OFF
ON
OFF
VS
EN
A0
Channel
A1
Select
A2
A3
COM
VOUT
CL = 100pF
VOUT
∆VOUT
GND
V–
–5V
∆VOUT is the measured Voltage due to charge transfer
error Q when the channel turns off.
VCTE = CL = ∆VOUT
Figure 5. Charge Injection (VCTE)
VIN
RS = 50Ω
+5V
V+
NO1
NO16
A0
A1
A2
A3
GND EN
COM
V–
10nF
VOUT
RL = 1k
–5V
Off-isolation = 20log VOUT
VIN
Figure 6. Off-Isolation (VISO)
R = 1kΩ
+5V
VOUT NO1
V+
VIN
NO2
NO16
A0
A1
A2
A3
GND EN
COM
V–
Crosstalk = 20log
–5V
VOUT
VIN
Figure 7. Cross Talk (VCT)
10nF
RL = 1k
8
PS8443E
12/18/02
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