SM5876 데이터 시트보기 (PDF) - Nippon Precision Circuits

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SM5876

3rd-order Σ∆, 2-channel D/A Converter

Nippon Precision Circuits  

SM5876AM

FUNCTIONAL DESCRIPTION

System Clock/Speed Switching (XTI, XTO, CKO, CKSL)

The system clock on XTI can be set to run at one of

two speeds, 384fs (normal speed) or 768fs (double-

speed), where fs is the input frequency on LRCI. The

speed for CD playback is set by the input level on

CKSL, as shown in table 1.

Table 1. System clock select

Parameter

XTI input clock

frequency

CD playback XTI

frequency

CKO output clock

frequency

Internal system

clock period

Symbol

fXI

(= 1/tXI)

fXI

CKSL

HIGH

LOW

768fs

384fs

33.8688 MHz

at fs = 44.1

kHz

16.9344 MHz

at fs = 44.1

kHz

fCO

768fs

384fs

TSYS

2tXI

tXI

Note that the input clock accuracy and signal-to-

noise ratio greatly influence the AC analog character-

istics. Accordingly, care should be taken to ensure

that the clock is free from jitter.

The system clock can be controlled by a crystal

oscillator comprising a crystal connected between

XTI and XTO and the built-in CMOS inverter. Alter-

natively, an external system clock can be input on

XTI. As the internal CMOS inverter has a feedback

resistor, the external clock can be AC coupled to

XTI. The system clock is output on CKO.

System Reset (RSTN)

The device should be reset in the following cases.

s At power ON

s When LRCI and/or the system clock XTI stop, or

other abnormalities occur.

s When switching the XTI clock 768fs ⇔ 384fs.

The device is reset by applying a LOW-level pulse on

RSTN. At system reset, the internal arithmetic opera-

tion and output timing counter are synchronized on

the next LRCI rising edge, as shown in figure 1.

RSTN

LRCI

Low

1

2

3

9 10

Internal

Reset

LO(LON)

RO(RON)

Output Muted

Figure 1. System reset timing

Output mute

At power-ON reset (when RSTN goes LOW), the

outputs LO (LON) and RO (RON) enter the output

mute state. Mute is released on the 9th LRCI rising

edge after RSTN goes HIGH. During this cycle, the

timing reset can cause output noise to be generated.

NIPPON PRECISION CIRCUITS—13

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