SM5876AM 데이터 시트보기 (PDF) - Nippon Precision Circuits

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SM5876AM

3rd-order Σ∆, 2-channel D/A Converter

Nippon Precision Circuits  

BLOCK DIAGRAM

SM5876AM

LRCI

BCKI

DI

MLEN

MCK

MDT

RSTN

CKSL

DVSS

DVDD

TSTN

Microcontroller

interface

Timing

control

Input interface

L

R

Filter & attenuation

operation block

L

R

L

PWM data

generation block

R

Noise shaper

operation block

MUTEO

CKO

XVSS

XTO

XTI

XVDD

AVDDL

AVDDR

LO

LON

AVSS

RON

RO

PIN DESCRIPTION

Number

1

2

3

4

5

6

7

8

9

10

11

12

13

14

Name

MLEN

CKSL

CKO

DVSS

BCKI

DI

DVDD

LRCI

TSTN

LO

AVDDL

LON

AVSS

RON

I/O

Description

Ip Microcontroller control latch clock input

Ip 768fs/384fs clock select. 768fs when HIGH, and 384fs when LOW.

O Oscillator clock buffer output

Digital ground pin

Ip Data bit clock input pin

Ip Serial data input pin

Digital supply pin

Ip Sample data rate (fs) clock input pin. Left channel when HIGH, and right channel when LOW.

Ip Test input pin

O Left-channel analog output (+)

Left-channel analog supply pin

O Left-channel analog output (−)

Analog ground pin

O Right-channel analog output (−)

NIPPON PRECISION CIRCUITS—2

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