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74LVX573MX

Low Voltage Octal Latch with 3-STATE Outputs

Fairchild Semiconductor 

June 1993

Revised April 2005

74LVX573

Low Voltage Octal Latch with 3-STATE Outputs

General Description

The LVX573 is a high-speed octal latch with buffered com-

mon Latch Enable (LE) and buffered common Output

Enable (OE) inputs. The LVX573 is functionally identical to

the LVX373 but with inputs and outputs on opposite sides

of the package. The inputs tolerate up to 7V allowing inter-

face of 5V systems to 3V systems.

Features

s Input voltage translation from 5V to 3V

s Ideal for low power/low noise 3.3V applications

s Guaranteed simultaneous switching noise level and

dynamic threshold performance

Ordering Code:

Order Number Package Number

Package Description

74LVX573M

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74LVX573SJ

M20D

Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVX573MTC

MTC20

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Logic Symbols

Connection Diagram

IEEE/IEC

Pin Descriptions

Pin Names

D0–D7

LE

OE

O0–O7

Description

Data Inputs

Latch Enable Input

3-STATE Output Enable Input

3-STATE Latch Outputs

© 2005 Fairchild Semiconductor Corporation DS011616

www.fairchildsemi.com

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