HEF4104BP,652 데이터 시트보기 (PDF) - NXP Semiconductors.

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HEF4104BP,652

Quad low-to-high voltage translator with 3-state outputs

NXP Semiconductors. 

NXP Semiconductors

HEF4104B

Quad low-to-high voltage translator with 3-state outputs

Table 7. Dynamic characteristics …continued

Tamb = 25 °C; for test circuit see Figure 7; unless otherwise specified.

Symbol Parameter

Conditions

Extrapolation formula[1] Min Typ Max Unit

tPLZ

LOW to OFF-state OE to Bn, Bn; see Figure 6

propagation delay

VDD(A) = VDD(B) = 5 V

VDD(A) = VDD(B) = 10 V

VDD(A) = VDD(B) = 15 V

tPZH

OFF-state to HIGH OE to Bn, Bn; see Figure 6

propagation delay

VDD(A) = VDD(B) = 5 V

VDD(A) = VDD(B) = 10 V

VDD(A) = VDD(B) = 15 V

tPZL

OFF-state to LOW OE to Bn, Bn; see Figure 6

propagation delay

VDD(A) = VDD(B) = 5 V

VDD(A) = VDD(B) = 10 V

VDD(A) = VDD(B) = 15 V

-

70 135 ns

-

55 105 ns

-

55 110 ns

-

195 395 ns

-

95 195 ns

-

80 165 ns

-

195 395 ns

-

95 190 ns

-

80 160 ns

[1] Typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF).

Table 8. Dynamic power dissipation

VDD(A) = VDD(B); VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.

Symbol Parameter

VDD[1] Typical formula (μW)

PD

dynamic power

dissipation

5V

10 V

PD = 3000 × fi + Σ(fo × CL) × VDD2

PD = 12200 × fi + Σ(fo × CL) × VDD2

15 V PD = 31000 × fi + Σ(fo × CL) × VDD2

[1] VDD is the same as VDD(A) and VDD(B).

where

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

Σ(fo × CL) = sum of the outputs;

VDD = supply voltage in V.

HEF4104B_7

Product data sheet

Rev. 07 — 16 December 2009

© NXP B.V. 2009. All rights reserved.

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