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ICS844256D

FemtoClock® Crystal-to-LVDS Frequency Synthesizer w/Integrated Fanout Buffer

Integrated Device Technology 

ICS844256D Data Sheet

FEMTOCLOCK® CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER

Table 4C. LVCMOS/LVTTL DC Characteristics, VDD = 3.3V ± 5%, VDDO = 3.3V ± 5% or 2.5V ± 5%, TA = 0°C to 70°C

Symbol Parameter

Test Conditions

Minimum Typical Maximum Units

VIH

Input High Voltage

2

VIL

Input Low Voltage

-0.3

FB_SEL

VDD = VIN = 3.465V

IIH

Input High Current

PLL_BYPASS,

N_SEL0, N_SEL1

VDD = VIN = 3.465V

VDD + 0.3

V

0.8

V

150

µA

5

µA

FB_SEL

VDD = 3.465V, VIN = 0V

-5

µA

IIL

Input Low Current

PLL_BYPASS,

N_SEL0, N_SEL1

VDD = 3.465V, VIN = 0V

-150

µA

Table 4D. LVDS DC Characteristics, VDD = VDDO = 3.3V ± 5%, TA = 0°C to 70°C

Symbol Parameter

Test Conditions

Minimum

VOD

∆VOD

VOS

∆VOS

Differential Output Voltage

VOD Magnitude Change

Offset Voltage

VOS Magnitude Change

247

1.125

Typical

350

1.25

Maximum

454

50

1.45

50

Units

mV

mV

V

mV

Table 4E. LVDS DC Characteristics, VDD = 3.3V ± 5%, VDDO = 2.5V ± 5%, TA = 0°C to 70°C

Symbol Parameter

Test Conditions

Minimum Typical

VOD

∆VOD

VOS

∆VOS

Differential Output Voltage

VOD Magnitude Change

Offset Voltage

VOS Magnitude Change

247

350

1.125

1.25

Maximum

454

50

1.45

50

Units

mV

mV

V

mV

Table 5. Crystal Characteristics

Parameter

Test Conditions

Mode of Oscillation

Frequency

Equivalent Series Resistance (ESR)

Shunt Capacitance

Drive Level

NOTE: Characterized using an 18pF parallel resonant crystal.

Minimum Typical Maximum

Fundamental

15.625

25.5

50

7

1

Units

MHz

Ω

pF

mW

ICS844256DG REVISION A AUGUST 5, 2010

5

©2010 Integrated Device Technology, Inc.

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