K4N26323AE 데이터 시트보기 (PDF) - Samsung

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K4N26323AE

128Mbit GDDR2 SDRAM 1M x 32Bit x 4 Banks with Differential Data Strobe and DLL GDDR2 SDRAM

Samsung 

K4N26323AE-GC

128M GDDR2 SDRAM

Seamless Burst Write Operation : AL = 1, CL = 7, WL = AL + 1 = 2

0

1

2

3

7

8

9

10

11

CK, CK

CMD

Post CAS

WRITE A

NOP

Post CAS

WRITE B

NOP

NOP

NOP

NOP

NOP

NOP

DQS

DQ’s

WL = 2

DINA0 DINA1 DINA2 DINA3 DINB0 DINB1 DINB2 DINB3

The seamless burst write operation is supported by enabling a write command every other clock.

This operation is allowed regardless of same or different banks as long as the banks are activated

- 19 -

Rev. 1.7 (Jan. 2003)

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