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AM29LV256MH103RPGF 데이터 시트보기 (PDF) - Advanced Micro Devices

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AM29LV256MH103RPGF Datasheet PDF : 69 Pages
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DATASHEET
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5
Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 9
Table 1. Device Bus Operations ....................................................... 9
Word/Byte Configuration .......................................................... 9
VersatileIOTM (VIO) Control ........................................................ 9
Requirements for Reading Array Data ................................... 10
Page Mode Read ............................................................................10
Writing Commands/Command Sequences ............................ 10
Write Buffer .....................................................................................10
Accelerated Program Operation ......................................................10
Autoselect Functions .......................................................................10
Standby Mode ........................................................................ 10
Automatic Sleep Mode ........................................................... 11
RESET#: Hardware Reset Pin ............................................... 11
Output Disable Mode .............................................................. 11
Table 2. Sector Address Table........................................................ 12
Autoselect Mode ..................................................................... 23
Table 3. Autoselect Codes, (High Voltage Method) ....................... 23
Sector Group Protection and Unprotection ............................. 24
Table 4. Sector Group Protection/Unprotection Address Table ..... 24
Write Protect (WP#) ................................................................ 26
Temporary Sector Group Unprotect ....................................... 26
Figure 1. Temporary Sector Group Unprotect Operation ................26
Figure 2. In-System Sector Group Protect/Unprotect Algorithms ...27
SecSi (Secured Silicon) Sector Flash Memory Region .......... 28
Table 5. SecSi Sector Contents ...................................................... 28
................................................................................................ 29
Figure 3. SecSi Sector Protect Verify ..............................................29
Hardware Data Protection ...................................................... 29
Low VCC Write Inhibit .....................................................................29
Write Pulse “Glitch” Protection ........................................................29
Logical Inhibit ..................................................................................29
Power-Up Write Inhibit ....................................................................29
Common Flash Memory Interface (CFI) . . . . . . . 29
Table 6. CFI Query Identification String ..........................................30
Table 7. System Interface String..................................................... 30
Table 8. Device Geometry Definition ..............................................31
Table 9. Primary Vendor-Specific Extended Query ........................32
Command Definitions . . . . . . . . . . . . . . . . . . . . . 32
Reading Array Data ................................................................ 32
Reset Command ..................................................................... 33
Autoselect Command Sequence ............................................ 33
Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 33
Word/Byte Program Command Sequence ............................. 33
Unlock Bypass Command Sequence ..............................................34
Write Buffer Programming ...............................................................34
Accelerated Program ......................................................................35
Figure 4. Write Buffer Programming Operation ...............................36
Figure 5. Program Operation ..........................................................37
Program Suspend/Program Resume Command Sequence ... 37
Figure 6. Program Suspend/Program Resume ...............................38
Chip Erase Command Sequence ........................................... 38
Sector Erase Command Sequence ........................................ 38
Table 10. Erase Operation ............................................................. 39
Erase Suspend/Erase Resume Commands ........................... 39
Command Definitions ............................................................. 40
Table 11. Command Definitions (x16 Mode, BYTE# = VIH) ........... 40
Table 12. Command Definitions (x8 Mode, BYTE# = VIL).............. 41
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 42
DQ7: Data# Polling ................................................................. 42
Figure 7. Data# Polling Algorithm .................................................. 42
RY/BY#: Ready/Busy# ............................................................ 43
DQ6: Toggle Bit I .................................................................... 43
Figure 8. Toggle Bit Algorithm ........................................................ 44
DQ2: Toggle Bit II ................................................................... 44
Reading Toggle Bits DQ6/DQ2 ............................................... 44
DQ5: Exceeded Timing Limits ................................................ 45
DQ3: Sector Erase Timer ....................................................... 45
DQ1: Write-to-Buffer Abort ..................................................... 45
Table 13. Write Operation Status................................................... 45
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 46
Figure 9. Maximum Negative Overshoot Waveform ..................... 46
Figure 10. Maximum Positive Overshoot Waveform ..................... 46
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 46
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 47
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 11. Test Setup ..................................................................... 48
Table 14. Test Specifications ......................................................... 48
Key to Switching Waveforms. . . . . . . . . . . . . . . . 48
Figure 12. Input Waveforms and
Measurement Levels ...................................................................... 48
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 49
Read-Only Operations ........................................................... 49
Figure 13. Read Operation Timings ............................................... 49
Figure 14. Page Read Timings ...................................................... 50
Hardware Reset (RESET#) .................................................... 51
Figure 15. Reset Timings ............................................................... 51
Erase and Program Operations .............................................. 52
Figure 16. Program Operation Timings .......................................... 53
Figure 17. Accelerated Program Timing Diagram .......................... 53
Figure 18. Chip/Sector Erase Operation Timings .......................... 54
Figure 19. Data# Polling Timings (During Embedded Algorithms) . 55
Figure 20. Toggle Bit Timings (During Embedded Algorithms) ...... 56
Figure 21. DQ2 vs. DQ6 ................................................................. 56
Temporary Sector Unprotect .................................................. 57
Figure 22. Temporary Sector Group Unprotect Timing Diagram ... 57
Figure 23. Sector Group Protect and Unprotect Timing Diagram .. 58
Alternate CE# Controlled Erase and Program Operations ..... 59
Figure 24. Alternate CE# Controlled Write (Erase/Program)
Operation Timings .......................................................................... 60
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 60
Erase And Programming Performance. . . . . . . . 61
TSOP Pin and BGA Package Capacitance . . . . . 61
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 63
TS056/TSR056—56-Pin Standard/Reverse Thin Small Outline
Package (TSOP) ..................................................................... 63
LAC064—64-Ball Fortified Ball Grid Array
18 x 12 mm Package .............................................................. 64
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 65
December 16, 2005
Am29LV256M
3

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