Table 5. Electrical Characteristics (TC = 25°C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Stage 2 — Off Characteristics
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
Zero Gate Voltage Drain Leakage Current
(VDS = 28 Vdc, VGS = 0 Vdc)
Gate - Source Leakage Current
(VGS = 1.5 Vdc, VDS = 0 Vdc)
IDSS
—
—
10
μAdc
IDSS
—
—
1
μAdc
IGSS
—
—
1
μAdc
Stage 2 — On Characteristics
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 140 μAdc)
VGS(th)
1.2
2
2.7
Vdc
Gate Quiescent Voltage
(VDS = 28 Vdc, IDQ2 = 330 mAdc)
VGS(Q)
—
2.8
—
Vdc
Fixture Gate Quiescent Voltage
VGG(Q)
7
8
9
Vdc
(VDD = 28 Vdc, IDQ2 = 330 mAdc, Measured in Functional Test)
Drain - Source On - Voltage
(VGS = 10 Vdc, ID = 1 Adc)
VDS(on)
0.2
0.39
1.2
Vdc
Stage 2 — Dynamic Characteristics (1)
Output Capacitance
(VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)
Coss
—
246
—
pF
Functional Tests (3) (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1 = 130 mA, IDQ2 = 330 mA, Pout = 4 W Avg.,
f = 1932.5 MHz, Single - Carrier W - CDMA, 3GPP Test Model 1, 64 DPCH, 45.2% Clipping, Input Signal PAR = 7.5 dB @ 0.01% Probability on
CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset.
Power Gain
Gps
29.5
32
34.5
dB
Power Added Efficiency
PAE
16
17.5
—
%
Adjacent Channel Power Ratio
ACPR
—
- 50
- 46
dBc
Input Return Loss
IRL
—
- 15
-8
dB
Typical Performances (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1 = 130 mA, IDQ2 = 330 mA, 1930 - 1990 MHz
Pout @ 1 dB Compression Point, CW
P1dB
—
30
—
W
IMD Symmetry @ 22 W PEP, Pout where IMD Third Order
IMDsym
MHz
Intermodulation ` 30 dBc (Delta IMD Third Order Intermodulation
—
60
—
between Upper and Lower Sidebands > 2 dB)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Quiescent Current Accuracy over Temperature (2)
with 5.6 kΩ Gate Feed Resistors ( - 30 to 85°C)
VBWres
—
65
—
MHz
ΔIQT
—
±3
—
%
Gain Flatness in 60 MHz Bandwidth @ Pout = 4 W Avg.
Average Deviation from Linear Phase in 60 MHz Bandwidth
@ Pout = 30 W CW
Average Group Delay @ Pout = 30 W CW, f = 1960 MHz
Part - to - Part Insertion Phase Variation @ Pout = 30 W CW,
f = 1960 MHz, Six Sigma Window
GF
—
1.2
—
dB
Φ
—
0.5
—
°
Delay
—
2.5
—
ns
ΔΦ
—
33
—
°
Gain Variation over Temperature
( - 30°C to +85°C)
ΔG
—
0.029
—
dB/°C
Output Power Variation over Temperature
( - 30°C to +85°C)
ΔP1dB
—
0.003
—
dBm/°C
1. Part internally matched both on input and output.
2. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family and to AN1987, Quiescent Current Control
for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf. Select Documentation/Application Notes - AN1977 or
AN1987.
3. Measurement made with device in straight lead configuration before any lead forming operation is applied.
(continued)
MW7IC2040NR1 MW7IC2040GNR1 MW7IC2040NBR1
RF Device Data
Freescale Semiconductor
3