IRSF3011
10
T = 150°C
T = 25°C
1
0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
Source to Drain Voltage (Volts)
Figure 17 Source-Drain Diode Forward Voltage
2000
1750
1500
Vdd=25V
Ids = 4A
1250
1000
750
500
250
0
0 25 50 75 100 125 150
Starting Junction Temperature (°C)
Figure 18 Unclamped Single Pulse Inductive Energy to
Failure vs. Starting Junction Temperature
Application Information
Introduction
Protected monolithic POWER MOSFETs offer simple,
cost effective solutions in applications where ex-
treme operating conditions can occur. The margin
between the operating conditions and the absolute
maximum values can be narrowed, resulting in
better utilization of the device and lower cost. ESD
protection also reduces the off-circuit failures during
handling and assembly.
General Description
The IRSF3011 is a fully protected monolithic N-
channel logic level POWER MOSFET with 200mW
(max) on-resistance. The built-in protections include
over-current, over-temperature, ESD and over-volt-
age.
The over-current and over-temperature protections
make the IRSF3011 / IRSF3012 indestructible under
any load conditions in switching or in linear applica-
tions. The built-in ESD protection minimizes the risk
of ESD damage when the device is off-circuit. The
IRSF3011 / IRSF3012 is fully characterized for
avalanche operation and can be used for fast de-
energization of inductive loads.
10
The TO-220 packaged IRSF3011 / IRSF3012 offers
an easy upgrade with direct pin-to-pin replacement
from non-protected devices.
Block Diagram
As illustrated in figure A1, a zener diode between the
input and the source provides the ESD protection for
the input and also limits the voltage applied to the
input to 10V.
The R-S flip-flop memorizes the occurrence of an
error condition and controls the Q2 and Q3 switches.
The flip-flop can be cleared by holding the input low
for the specified minimum duration.
COMP1 and COMP2 comparators are used to com-
pare the over-current and over-temperature signals
with the built-in reference. Either comparator can
reset the fault flip-flop and turn Q1 off. During fault
condition, Q2 disconnects the gate of Q1 from the
input, and Q3 shorts the gate and source of Q1,
resulting in rapid turn-off of Q1. The zener diode
between the gate and drain of Q1 turns Q1 on when
the drain to source voltage exceeds 55V.
www.irf.com