IS80LV51-24W 데이터 시트보기 (PDF) - Integrated Circuit Solution Inc

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IS80LV51-24W

CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER

Integrated Circuit Solution Inc 

IS80LV51

IS80LV31

OTHER INFORMATION

Reset

The reset input is the RST pin, which is the input to a

Schmitt Trigger.

A reset is accomplished by holding the RST pin high for at

least two machine cycles (24 oscillator periods), while the

oscillator is running. The CPU responds by generating an

internal reset, with the timing shown in Figure 6.

The external reset signal is asynchronous to the internal

clock. The RST pin is sampled during State 5 Phase 2 of

every machine cycle. The port pins will maintain their

current activities for 19 oscillator periods after a logic 1 has

been sampled at the RST pin; that is, for 19 to 31 oscillator

periods after the external reset signal has been applied to

the RST pin.

The internal reset algorithm writes 0s to all the SFRs except

the port latches, the Stack Pointer, and SBUF. The port

latches are initialized to FFH, the Stack Pointer to 07H, and

SBUF is indeterminate. Table 2 lists the SFRs and their

reset values.

Then internal RAM is not affected by reset. On power-up

the RAM content is indeterminate.

Table 2. Reset Values of the SFR's

SFR Name

Reset Value

PC

0000H

ACC

00H

B

00H

PSW

00H

SP

07H

DPTR

0000H

P0–P3

FFH

IP

XXX00000B

IE

0XX00000B

TMOD

00H

TCON

00H

TH0

00H

TL0

00H

TH1

00H

TL1

00H

SCON

00H

SBUF

Indeterminate

PCON

0XXX0000B

Integrated Circuit Solution Inc.

7

MC006-0B

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