PMS134-S14 데이터 시트보기 (PDF) - Unspecified

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PMS134-S14

8bit OTP MCU with 12-bit ADC

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PMS133/PMS134

8bit OTP MCU with 12-bit ADC

 Special notes about voltage and current while Multi-Chip-Package(MCP) or On-Board Programming

(1) PA5 (VPP) may be higher than 11V.

(2) VDD may be higher than 6.5V, and its maximum current may reach about 20mA.

(3) All other signal pins level (except GND) are the same as VDD.

User should confirm when using this product in MCP or On-Board Programming, the peripheral circuit or

components will not be destroyed or limit the above voltages.

9.2.9. Programming Compatibility

PMS133 and PMS134 are directional compatible. PMS133 program can write into PMS134 real chip, but not

vice versa.

9.3 Using ICE

(1) PDK5S-I-S01/2(B) supports PMS133/PMS134 MCU emulation, the following items should be noted when

using PDK5S-I-S01/2(B) to emulate PMS133/PMS134:

 PDK5S-I-S01/2(B) doesn’t support the instruction NMOV/SWAP/NADD/COMP with RAM.

 PDK5S-I-S01/2(B) doesn’t support SYSCLK=ILRC/16.

 PDK5S-I-S01/2(B) doesn’t support the dynamic setting of function misc.4 (Only fix to 0 or 1)

 PDK5S-I-S01/2(B) doesn’t support the function Tm2.gpcrs/Tm3.gpcrs.

 PDK5S-I-S01/2(B) doesn’t support band-gap reference voltage for ADC channel F of ADCRGC [3:2].

Only 1.2V exists and is fixed.

 PDK5S-I-S01/2(B) has different setting of PC2 and PC1 in adcc.

 Fast Wakeup time is different from PDK5S-I-S01/2(B): 128 SysClk, PMS133/PMS134: 45 ILRC

 Watch dog time out period is different from PDK5S-I-S01/2(B):

WDT period

PDK5S-I-S01/2(B) PMS133/PMS134

misc[1:0]=00

2048 * TILRC

8192 * TILRC

misc[1:0]=01

4096 * TILRC

16384 * TILRC

misc[1:0]=10

16384 * TILRC

65536 * TILRC

misc[1:0]=11

256 * TILRC

262144 * TILRC

 PDK5S-I-S01/2(B) doesn’t support the code options: GPC_PWM, TMx_source, PWM_Source and

TMx_bit.

 PDK5S-I-S01/2(B) only has 240 bytes RAM for data memory.

 PDK5S-I-S01/2(B) only has 0xF00 program memory.

 The PCDIER register of the PDK5S-I-S01/2(B) emulator is different from the real chip. The PCDIER[0]

of the PDK5S-I-S01/2(B) is used to set PC0~PC3 to be digital input whereas PCDIER[1] is used to set

PC4~ PC7 to be digital input. It is recommended not to set PCDIER.

 When using PB1 in ADCRGC, PA1 must float.

 When using GPCC output, PA3 will be influenced.

©Copyright 2018, PADAUK Technology Co. Ltd Page 106 of 106 PDK-DS-PMS133/134-EN_V103 – Nov. 13, 2018

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