S-24C32CH 데이터 시트보기 (PDF) - Seiko Instruments Inc

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S-24C32CH

FOR AUTOMOTIVE 105°C OPERATION 2-WIRE SERIAL E2PROM

Seiko Instruments Inc 

Rev.2.1_01_H

FOR AUTOMOTIVE 105°C OPERATION 2-WIRE SERIAL E2PROM

S-24C32C/64C H Series

6. 2 Page write

The page write mode allows up to 32 bytes to be written in a single write operation in the S-24C32C/64C.

Its basic process to transmit data is as same as byte write, but it operates page write by sequentially receiving

8-bit write data as much data as the page size has.

When the S-24C32C/64C receives a 7-bit device address and a 1-bit read / write instruction code set to “0”,

following a start condition, it generates an acknowledge. And the S-24C32C/64C receives a upper 8-bit word

address, and responds with an acknowledge. Then the S-24C32C/64C receives a lower 8-bit word address, and

responds with an acknowledge. After the S-24C32C/64C receives 8-bit write data and responds with an

acknowledge, it receives 8-bit write data corresponding to the next word address, and generates an acknowledge.

The S-24C32C/64C repeats reception of 8-bit write data and generation of acknowledge in succession. The

S-24C32C/64C can receive as many write data as the maximum page size.

Receiving a stop condition initiates a write cycle of the area starting from the designated memory address and

having the page size equal to the received write data.

S

W

T

R

A

I

R

DEVICE

T

UPPER

LOWER

T

ADDRESS E

WORD ADDRESS (n)

WORD ADDRESS (n)

SDA LINE

1 0 1 0 A2 A1 A0 0 X X X W12 W11 W10 W9 W8 W7 W6 W5 W4 W3 W2 W1 W0 D7

M

LR A

A

A

S

S/ C

C

C

B

BW K

K

K

DATA (n)

S

T

O

DATA (n+x)

P

D0 D7

D0

Remark W12 is arbitrary in the S-24C32C.

Figure 13 Page Write

In the S-24C32C, the lower 5 bits of the word address are automatically incremented every time when the

S-24C32C/64C receives 8-bit write data. If the size of the write data exceeds 32 bytes, the upper 7 bits of the

word address remain unchanged, and the lower 5 bits are rolled over and the last 32-byte data that the S-24C32C

received will be overwritten.

In the S-24C64C, the lower 5 bits of the word address are automatically incremented every time when the

S-24C32C/64C receives 8-bit write data. If the size of the write data exceeds 32 bytes, the upper 8 bits of the

word address remain unchanged, and the lower 5 bits are rolled over and the last 32-byte data that the

S-24C64C received will be overwritten.

13

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