DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

74LVC574A View Datasheet(PDF) - Philips Electronics

Part Name
Description
Manufacturer
74LVC574A Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Philips Semiconductors
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
Product specification
74LVC574A
AC CHARACTERISTICS
GND = 0V; tr = tf v 2.5ns; CL = 50pF; RL = 500; Tamb = –40°C to +85°C.
SYMBOL
PARAMETER
WAVEFORM
VCC = 3.3V ±0.3V
MIN TYP1 MAX
tPHL
Propagation delay
tPLH
CP to Qn
1, 4
1.5
4.8
7.0
tPZH
3-State output enable time
tPZL
OE to Qn
2, 4
1.5
4.0
7.5
tPHZ
3-State output disable time
tPLZ
OE to Qn
2, 4
1.5
3.5
6.0
tW
Clock pulse width HIGH or LOW
1
3.4
1.7
tSU
Setup time
Dn to CP
3
2.0
0.3
th
Hold time
Dn to CP
3
1.5
–0.2
fmax
Maximum clock pulse frequency
1
100
NOTE:
1. Unless otherwise stated, all typical values are at VCC = 3.3V and Tamb = 25°C.
LIMITS
VCC = 2.7V
MIN MAX
1.5
8.0
1.5
8.5
1.5
6.5
3.4
2.0
1.5
80
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V; VM = 0.5 VCC at VCC t 2.7V.
VOL and VOH are the typical output voltage drop that occur with the
output load.
VX = VOL + 0.3V at VCC w 2.7V; VX = VOL + 0.1 VCC at VCC t 2.7V
VY = VOH –0.3V at VCC w 2.7V; VY = VOH – 0.1 VCC at VCC t 2.7V
VI
nOE INPUT
VM
GND
VCC = 1.2V
TYP
21
17
11
UNIT
ns
ns
ns
ns
ns
ns
MHz
VI
CP INPUT
GND
VOH
Qn OUTPUT
VOL
1/fmax
VM
VM
tw
tPHL
VM
VM
tPLH
VM
SA00394
Waveform 1. Clock (CP) to output (Qn) propagation delays, the
clock pulse width, output transition times and the maximum
clock pulse frequency.
VI
CP
INPUT
VM
GND
tsu
tsu
VI
ÉÉÉÉ Dn
INPUT
VM
ÉÉÉÉÉÉÉÉ GND
ÉÉÉth ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉth ÉÉÉ
VOH
Qn
OUTPUT
VM
VOL
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
SW00107
Waveform 2. Data setup and hold times for the Dn input to the
CP input.
VCC
Qn OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
tPLZ
VX
tPZL
VM
VOH
Qn OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
tPHZ
outputs
enabled
tPZH
VY
outputs
disabled
VM
outputs
enabled
Waveform 3. 3-State enable and disable times.
TEST CIRCUIT
SW00207
VI
PULSE
GENERATOR
VCC
D.U.T.
RT
VO
CL 50pF
S1
500
2 x VCC
Open
GND
500
VCC
t 2.7V
2.7V – 3.6V
VI
VCC
2.7V
Test
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
2 x VCC
GND
SY00003
Waveform 4. Load circuitry for switching times.
1998 Jul 29
6

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]