LC651204L View Datasheet(PDF) - SANYO -> Panasonic

Part Name

Description

Manufacturer

LC651204L

One-time programmable 4-bit singl-chip microcontroller

SANYO -> Panasonic 

LC65P29

Pin Descriptions

Pin name

VDD

VSS

Number

of pins I/O

Function

Power supply. Must be connected to +5 V

1

— during normal operation.

1

— Power supply. Must be connected to 0 V

during normal operation.

Option

OSC1/CE

OSC2/TA

1.Two-pin RC oscillator

(Single-pin external

I System clock oscillator connections. Leave clock input)

1

OSC2 open and input the external clock to 2.Two-pin ceramic

O OSC1 if an external clock is used.

oscillator

3.Divisor option: 1/1, 1/3,

or 1/4

State during reset

—

—

Function in

PROM mode

EPROM contorol

signal inputs

CE

TA

PA0/A6

PA1/A7

4

PA2/A8

PA3/A9

PC0/D0

PC1/D1

4

PC2/D2

PC3/D3

PD0/D4

PD1/D5

PD2/D6

4

PD3/D7

4

PE0/CMP0/A0

PE1/CMP1/A1

PE2/CMP2/A2

PE3/CMP3/A3

4

VREF0/A4

VREF1/A5/

2

DASEC

RES/VPP/OE

1

TEST/EPMOD 1

• I/O ports A0 to A3

Input in 4-bit units (IP instruction)

Output in 4-bit units (OP instruction)

Data testing in 1-bit units (BP and BNP

instructions)

I/O Data set and clear operations in 1-bit units Open-drain output

(SPB and RPB instructions)

• PA3 is used for standby mode control.

• Applications must assure that chattering

(key bounce) noise is not input during a

HALT instruction execution cycle.

• High-level output (The

n-channel output

transistor turned off.)

• Address inputs

A6 to A9

• I/O ports C0 to C3

1. Open-drain output

I/O

The pin functions are identical to those of

pins A0 to A3.

However, there is no standby mode

control function.

• The output during a reset can be specified

2. High-level output

during reset

3. Low-level output

during reset

• Selection of items 2 or

• High-level output

• Low-level output

(Depending on an

option selection.)

to be either high or low as an option.

3 is in 4-bit units.

• Data I/O

D0 to D3

I/O

• I/O ports D0 to D3

The pin functions are identical to those of

pins PC0 to PC3.

The same as for pins

PC0 to PC3

The same as pins PC0 to • Data I/O

PC3

D4 to D7

• When comparator input is selected:

CMP0 and CMP1 use VREF0 as the

reference voltage,

CMP2 and CMP3 use VREF1 as the

I reference voltage,

• Comparator inputs CMP0 to CMP3

Data input in 4-bit units (IP instruction)

• Data testing in 1-bit units (BP and BNP

instructions)

• When input is selected for port E

• Input ports E0 to E3

I Input in 4-bit units (IP instruction)

• Data testing in 1-bit units (BP and BNP

instructions)

1. Comparator input

2. Port E input

3. No feedback resistor

4. Feedback resistor

present

• Selection of items 1 or

2 is in 4-bit units.

• Items 3 and 4 are only

specified when item 1

is selected.

• Comparator reference voltage inputs

VREF0 and VREF1

VREF0 is the reference voltage input for

CMP0 and CMP1.

I

VREF1 is the reference voltage input for

CMP2 and CMP3.

• When PE0/CMP0 to PE3/CMP3 are

selected to function as port E inputs,

these pins are connected to VSS.

• System reset input

• Connect an external capacitor to effect the

I power-on reset.

• Input a low level for at least 4 clock cycles

to effect a reset restart.

• IC test pin

I

This pin must be connected to VSS during

normal operation.

• Address inputs

A0 to A3

• Address inputs

A4 and A5

• EPROM control

signal input

DASEC

• EPROM control

signal input

VPP/ OE

• EPROM control

signal input

EPMOD

No. 5894-5/14

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