CYM74S551PM-50C View Datasheet(PDF) - Cypress Semiconductor

Part Name

Description

Manufacturer

CYM74S551PM-50C

OPTi Viper Chip Set Level II Cache Module Family

Cypress Semiconductor 

PRELIMINARY

CYM74B550

CYM74P550A

CYM74S550, CYM74S551

Pin Definitions

Common Signals

VCC5

VCC3

GND

A18–A5

D63–D0

ECDOE

TAG7–TAG0

TAGWE

DIRTYI

DIRTYO

DIRTYWE

PD3–PD0

NC

CYM74B550 Only Signals

HACALE

OCA4

ECA4

CS7–CS0

ECAWE

CYM74P550A,CYM74S55X

Signals

CLK

A4–A3

ADSC

ADSP

ADV

SYNCS0

SYNCS1

WE7–WE0

Description

5V Supply

3.3V Supply are CYM74P550A and CYM74S55X only

Ground

Addresses from processor

64-bit Data bus from processor

Even bank output enable input

8-bit Tag RAM bidirectional bus

Tag RAM write enable input

1-bit Dirty RAM input

1-bit Dirty RAM output

Dirty RAM write enable input

Presence Detect pins

Signal not connected on module.

Description

Address Latch Enable input to transparent address latches

Address bit A3 in async cache module (CYM74B550)

Address bit A4 in async cache module (CYM74B550)

Data RAM Chip Select inputs

Even bank write enable input

Description

Clock input

Lower order address bits from processor

Cache Controller Address Strobe input

Processor Address Strobe input

Burst Address Advance input

Even bank synchronous burst RAM chip select input

Odd bank synchronous burst RAM chip select input (not used)

Write enable inputs to Data RAMs

Presence Detect Pins

Asynchronous - CYM74B550

Sync Pipelined - CYM74P550A

Synch Burst - CYM74S550

Synch Burst - CYM74S551

PD3 PD2 PD1 PD0

NC

NC GND GND

NC

NC GND NC

NC

NC

NC GND

NC GND NC GND

5

Share Link: