Philips Semiconductors
P-channel enhancement mode
vertical D-MOS transistors
Product specification
BSP304; BSP304A
FEATURES
• Direct interface to C-MOS, TTL etc.
• High speed switching
• No secondary breakdown.
DESCRIPTION
P-channel enhancement mode vertical D-MOS transistor
in a TO-92 variant package.
APPLICATIONS
• Intended for use as a Line current interruptor in
telephone sets and for applications in relay, high speed
and line transformer drivers.
PINNING - TO-92 variant
PIN
SYMBOL
BSP304
1
g
2
d
3
s
BSP304A
1
s
2
g
3
d
DESCRIPTION
gate
drain
source
source
gate
drain
handbook, halfpage
1
2
3
d
g
MAM144
s
Fig.1 Simplified outline and symbol.
CAUTION
The device is supplied in an antistatic package. The
gate-source input must be protected against static
discharge during transport or handling.
QUICK REFERENCE DATA
SYMBOL
VDS
VGSO
VGSth
ID
RDSon
PARAMETER
drain-source voltage (DC)
gate-source voltage (DC)
gate-source threshold voltage
drain current (DC)
drain-source on-state resistance
Ptot
total power dissipation
CONDITIONS
open drain
ID = −1 mA; VDS = VGS
ID = −170 mA;
VGS = −10 V
up to Tamb = 25 °C
MIN.
−
−
−1.7
−
−
MAX.
−300
±20
−2.55
−170
17
UNIT
V
V
V
mA
Ω
−
1
W
1995 Apr 07
2