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TDA9160 View Datasheet(PDF) - Philips Electronics

Part Name
Description
Manufacturer
TDA9160
Philips
Philips Electronics Philips
TDA9160 Datasheet PDF : 27 Pages
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Philips Semiconductors
PAL/NTSC/SECAM decoder/sync processor
Preliminary specification
TDA9160
FUNCTIONAL DESCRIPTION
The TDA9160 is an I2C-bus
controlled, alignment free
PAL/NTSC/SECAM colour
decoder/sync processor/deflection
controller which has been designed
for use with baseband chrominance
delay lines.
In the standard operating mode the
I2C-bus address is 8A . If the TXT
output is connected to the positive rail
the address will change to 8E
The standards which the TDA9160
can decode are dependent on the
choice of external crystals. If a
4.4 MHz and a 3.6 MHz crystal are
used then SECAM, PAL 4.4/3.6 and
NTSC 4.4/3.6 can be decoded. If two
3.6 MHz crystals are used then only
PAL 3.6 and NTSC 3.6 can be
decoded. Which 3.6 MHz standards
can be decoded is dependent on the
exact frequencies of the crystal. In an
application where not all standards
are required only one crystal is
sufficient (in this instance the crystal
must be connected to the reference
crystal input (pin 30)). If a 4.4 MHz
crystal is used it must always be
connected to pin 30. Both crystals are
used to provide a reference for the
filters and the horizontal PLL,
however, only the reference crystal is
used to provide a reference for the
SECAM demodulator.
To enable the calibrating circuits to be
adjusted exactly two bits from the
I2C-bus address are used to indicate
which crystals are connected to the
IC.
The standard identification circuit is a
digital circuit without external
components; the search loop is
illustrated in Fig.3.
The decoder (via the I2C-bus) can be
forced to decode either SECAM or
PAL/NTSC (but not PAL or NTSC).
Crystal selection can also be forced.
Information, concerning which
standard and which crystal have been
selected and whether the colour killer
is ON or OFF is provided by the read
out. Using the forced-mode does not
affect the search loop, it does,
however, prevent the decoder from
reaching or staying in an unwanted
state. The identification circuit skips
impossible standards (e.g. SECAM
when no 4.4 MHz crystal is fitted) and
illegal standards (e.g. forced mode).
To reduce the risk of wrong
identification PAL has priority over
SECAM (only line identification is
used for SECAM).
The TDA9160 has two CVBS inputs
and one S-VHS input which can be
selected via the I2C-bus. The input
selector can also be switched to
enable CVBS2 to be processed,
providing that there is no S-VHS
signal present at the input. If the input
selector is set to CVBS2 it will switch
to S-VHS if an S-VHS sync pulse is
detected at the luminance input. The
S-VHS detector output can be read
via the I2C-bus.
If the voltage at either the S-VHS
luminance or the chrominance input
(pins 22 and 23) exceeds +5.5 V the
IC will revert to test mode.
The TDA9160 also provides outputs
for picture-in-picture and teletext (PIP
pin 20 and TXT pin 25). The decoder
input signal can be switched directly
to the TXT output. The PIP output
signal can be selected independently
from the TXT output. If S-VHS is
selected at the TXT output only the
luminance signal will be present; if
S-VHS is selected at the PIP output
then the luminance and chrominance
signals will be added.
All filters, including the luminance
delay line, are an integral part of the
IC. The filters are gyrator-capacitor
type filters. The resonant frequency of
the filters is controlled by a circuit that
uses the active crystal to tune the
SECAM Cloche filter during the
vertical flyback time. The remaining
filters and the delay line are matched
to this filter. The filters can be
switched to either 4.43 MHz,
4.28 MHz or 3.58 MHz irrespective of
the frequency of the active crystal.
The switching is controlled by the
identification circuit.
The S-VHS luminance signal does
not pass through the notch filter to
preserve bandwidth. The luminance
delay line delivers the Y signal to the
output 40 ns after the (R-Y) and
(B-Y) signals. This compensates for
the delay of the external chrominance
delay lines.
The PAL/NTSC demodulator
employs an oscillator that can operate
with either crystal (3.6 or 4.4 MHz). If
the I2C-bus indicates that only one
crystal is connected it will always
connect to the crystal at the reference
input (pin 30).
The Hue signal, which is adjustable
via the I2C-bus, is gated during the
burst for NTSC signals.
The SECAM demodulator is an
auto-calibrating PLL demodulator
which has two references. The
reference crystal, to force the PLL to
the desired free-running frequency
and the bandgap reference, to obtain
the correct absolute value of the
output signal. The VCO of the PLL is
calibrated during each vertical flyback
period, when the reference crystal is
active. When the second crystal is
active the VCO is not calibrated.
During this time the frequency of the
VCO is kept constant by applying a
constant voltage to its control input. If
the reference crystal is not 4.4 MHz
the decoder will not produce the
correct SECAM signals.
The main part of the sync circuit is a
432 × fH (6.75 MHz) oscillator the
frequency of which is divided by 432
December 1991
5

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