W83629D View Datasheet(PDF) - Winbond
Part Name
Description
Manufacturer
W83629D Datasheet PDF : 25 Pages
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W83628F & W83629D
4.1.1 PCI Interface, contiuned
SYMBOL PIN
I/O
FRAME#
40 I/O24tp3
IDSEL
29
INt
STOP#
IRDY#
TRDY#
39 I/O12tp3
41 I/O12tp3
42 I/O12tp3
DEVSEL#
43 I/O12tp3
SERR#
PAR
PCIRST#
45 OD12
49 I/O12tp3
71
INt
FUNCTION
Frame Signal. FRAME# is driven by the current PCI bus master
to indicate the beginning and duration of an access.
Initialization Device Select. IDSEL is used as a chip select
during configuration read and write transactions. This signal
should be externally tied to one of the upper 21 address signals.
Bus Stop#. STOP# indicates the current target is requesting the
master to stop the current PCI bus transaction.
Initiator Ready. IRDY# indicates the initiating agent ability to
complete the current data phase of the PCI bus transaction.
Target Ready. TRDY# indicates the target agent’s ability to
complete the current data phase of the PCI bus transaction.
Device Select. W83628F drives DEVSEL# to indicate that it is
the target of the current PCI bus transaction. W83628F uses
subtractive decoding and the NOGO protocol to claim PCI
transactions.
System Error. SERR# can be pulsed active by any PCI agent
that detects a system error condition.
Parity Signal. W83628F generates even parity across AD[31:0]
and C/BE[3:0]#.
PCI Reset. W83628F receives PCIRST# as a reset from the PCI
Bus.
7.1.2 Control Logic and Handshaking Signals
SYMBOL
HS[2:0]
PIN
112-
114
I/O
I/O12
FUNCTION
Handshaking Signals. HS[2:0] connected to W83629D for PCI
to ISA SET handshaking signals.
HS1 is handshaking Signal 1, this pin weak pulled-down
during PCIRST# is asserted, and apply a pull-up
resistor(4.7Kohm) to this pin disables ISA bridge subtraction
decoder.
ISOLATE#
72
NOGO
76
Isolation Control Input. Isolate# is an active low signal by user
INt programming to control the W83628F all output signals to
Isolation and Tri-state.
NOGO, This signal indicates which master initiated the current
INt
transaction and also indicates whether or not the current bus
cycle is targeted for the ISA bus. This signal is a point-to-point
connection between PCI HOST Bridge and W83628F.
Publication Release Date: May 18, 2005
-9-
Revision A1
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