UPD16341 View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
Manufacturer
UPD16341 Datasheet PDF : 20 Pages
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µ PD16341
2. PIN FUNCTIONS
Symbol
Pin Name
Description
/LBLK
Low blanking input
/LBLK = L : All output = L
/HBLK
High blanking input
/HBLK = L : All output = H
/LE
Latch enable input
Latch executed on fall
HZ
Output high impedance
Make all output high impedance by input H
/CLR
Register clear input
Inputting the low level of this signal clears the entire contents of the shift
register to low level.
An
RIGHT data input/output Note
When R,/L = H, An : input Bn : output
Bn
LEFT data input/output Note
When R,/L = L, An : output Bn : input
CLK
Clock input
Shift executed on rise
R,/L
Shift control input
Right shift mode when R,/L = H (In the case of 3-ch input)
SR1 : A1 → S1.......S94 → B1 (Same direction for SR2 and SR3)
Left shift mode when R,/L = L (In the case of 3-ch input)
SR1 : B1 → S94.......S1 → A1 (Same direction for SR2 and SR3)
The shift direction is the same in the case of 2-/4-/6-ch input.
IBS1,IBS2 Input mode switch
IBS1 IBS2
Input mode
H
L 3-bit input, 32-bit length shift register
L
L 6-bit input, 16-bit length shift register
H
H 2-bit input, 48-bit length shift register
L
H 4-bit input, 24-bit length shift register
O1 to O96
High withstand voltage output 120 V
VDD1
Logic power supply
5 V ± 10 %
VDD2
Driver power supply
20 to 110 V
VSS1
Logic ground
Connect to system ground
VSS2
Driver ground
Connect to system ground
Note When input mode is 2-/3-/4-bit, set unused input and output pins “L” level.
To use for module, the back side of IC chip must be held at the VSS (GND) level.
6
Data Sheet S14076EJ2V0DS00
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