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ML4818 View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
ML4818
Fairchild
Fairchild Semiconductor Fairchild
ML4818 Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PRODUCT SPECIFICATION
ML4818
Functional Description
Phase Modulator
Power is controlled by modulating the switching phase on
sides A and B of the full H-bridge converter (Figure 1).
Power is delivered to the output through the transformer sec-
ondary. The power conversion process is described by the
following sequence and illustrated by the timing diagram of
Figure 2:
1. A2 and B1 are high (Q1 and Q2 are on), beginning the
power conversion cycle.
2. After the Φ MOD comparator trips, B1 goes low turning
off Q2. The parasitic drain-to-source capacitances of Q2
and Q4 charge to +VIN. This forces the drain-to-source
voltage across Q3 to 0V.
3. B2 now goes high after tDELAY (set by RDELAY). Since the
voltage across Q3 is now 0V, B2 turns Q3 on at zero
voltage.
4. The CLOCK now goes high turning A2 off. During this
period, Q1 and Q2 and Q4 are off. The transformer leak-
age current discharges the drain-to-source capacitance
on Q4 until there is 0V across it.
5. A1 will remain low for a period defined by tDELAY, then it
goes high. The voltage across Q4 is now 0V as A1 turns
it on at zero voltage.
6. The previous sequence is now repeated with the oppo-
site polarity on all outputs (see Figure 2).
The above sequence is then repeated but with the opposite
polarity on all outputs.
TB
A2
B2
ML4818
B
A1
B1
ILIM
+VIN
Q3
Q1
LLEAKAGE
TRANSFORMER
Q2
Q4
RSENSE
TA
A
Figure 1. Simplified diagram of Phase Modulated power Outputs
CT
CLOCK
A2
tDELAY
A1
tDELAY
B1
tDELAY
tPD1
B2
tDELAY
tPD1
tDELAY
tPD1
tDELAY
B
A
Figure 2. Phase Modulation control waveforms (Shaded areas indicate a power cycle)
REV. 1.0.3 6/21/01
6

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