Philips Semiconductors
12-bit, 3.0 V, 20 Msps analog-to-digital
interface for CCD cameras
Objective specification
TDA9962
CHARACTERISTICS
VCCA = VCCD = 3.0 V; VCCO = 2.5 V; fpix = 20 MHz; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
Supplies
VCCA
analog supply voltage
2.7
3.0
VCCD
digital supply voltage
2.7
3.0
VCCO
digital outputs supply
voltage
2.2
2.5
ICCA
analog supply current
all clamps active
−
49
ICCD
digital supply current
−
2
ICCO
digital outputs supply
CL = 20 pF on all data
−
1
current
outputs; input ramp
response time is 800 µs
Digital inputs
PINS SHP, SHD AND CLK (REFERENCED TO DGND)
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
Ii
input current
0 ≤ Vi ≤ 5.5 V
Zi
input impedance
fCLK = 20 MHz
Ci
input capacitance
fCLK = 20 MHz
0
−
2.2
−
−3
−
−
50
−
−
PINS CLPDM, CLPOB, SEN, SCLK, SDATA, STBY, OE, BLK AND VSYNC
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
Ii
input current
0 ≤ Vi ≤ 5.5 V
0
−
2.2
−
−2
−
Clamps
GLOBAL CHARACTERISTICS OF THE CLAMP LOOPS
tW(clamp)
clamp active pulse width PGA code = 255 for
12
−
in number of pixels
maximum 4 LSB error
INPUT CLAMP (DRIVEN BY CLPDM)
gm(CDS)
CDS input clamp
transconductance
−
20
Correlated Double Sampling (CDS)
Vi(CDS)(p-p)
maximum peak-to-peak
CDS input amplitude
(video signal)
VCC = 2.85 V
VCC ≥ 3.0 V
650
−
800
−
Vreset(max)
maximum CDS input reset
pulse amplitude
500
−
Ii(IN)
input current into pin IN at floating gate level
tbf
−
Ci
input capacitance
−
2
tCDS(min)
CDS control pulses
Vi(CDS)(p-p) = 800 mV
11
15
minimum active time
black-to-white transition in
1 pixel with 99% Vi recovery
MAX. UNIT
3.6 V
3.6 V
3.6 V
−
mA
−
mA
−
mA
0.6 V
5.5 V
+3
µA
−
kΩ
2
pF
0.6 V
5.5 V
+2
µA
−
pixels
−
mS
−
mV
−
mV
−
mV
tbf
µA
−
pF
−
ns
2000 May 01
8