TDA9964 View Datasheet(PDF) - Philips Electronics
Part Name
Description
Manufacturer
TDA9964 Datasheet PDF : 24 Pages
| |||
Philips Semiconductors
12-bit, 3.0 V, 30 Msps analog-to-digital
interface for CCD cameras
Objective specification
TDA9964
SYMBOL
PARAMETER
CONDITIONS
Total chain characteristics (CDS + PGA + ADC)
fpix(max)
fpix(min)
tCLKH
tCLKL
td(SHD;CLK)
tsu(BLK;SHD)
Vi(IN)
Ntot(rms)
Ein(rms)
OCCD(max)
maximum pixel frequency
minimum pixel frequency
CLK pulse width HIGH
CLK pulse width LOW
time delay between
SHD and CLK
see Figs 3 and 4
set-up time of BLK compared see Figs 3 and 4
to SHD
video input dynamic signal
for ADC full-scale output
PGA code = 00
PGA code = 255
total noise from CDS input to see Fig.8
ADC output (RMS value)
PGA gain = 0 dB
PGA gain = 9 dB
equivalent input noise
voltage (RMS value)
PGA gain = 24 dB
PGA gain = 9 dB
maximum offset between
CCD floating level and CCD
dark pixel level
Digital-to-analog converter (OFDOUT DAC)
VOFDOUT(p-p) additional 8-bit control DAC
(OFD) output voltage
(peak-to-peak value)
Ri = 1 MΩ
VOFDOUT(0) DC output voltage for code 0
VOFDOUT(255) DC output voltage for
code 255
TCDAC
DAC output range
temperature coefficient
ZOFDOUT
IOFDOUT
DAC output impedance
OFD output current drive
static
Digital outputs (fpix = 30 MHz; CL = 10 pF); see Figs 3 and 4
VOH
HIGH-level output voltage IOH = −1 mA
VOL
LOW-level output voltage
IOL = 1 mA
IOZ
output current in 3-state
0.5 V < Vo < VCCO
mode
th(o)
output hold time
td(o)
output delay time
CL = 10 pF; VCCO = 3.0 V
CL = 10 pF; VCCO = 2.7 V
CL
output load capacitance
Serial interface
fSCLK(max)
maximum frequency of serial
interface
MIN.
TYP. MAX. UNIT
30
−
tbf
−
12
−
12
−
10
−
5
−
800
−
50
−
−
1.5
−
2.2
−
70
−
140
−100
−
−
MHz
−
MHz
−
ns
−
ns
−
ns
−
ns
−
mV
−
mV
−
LSB
−
LSB
−
µV
−
µV
+100 mV
−
1.0
−
V
−
AGND
−
V
−
AGND + 1.0 −
V
−
250
−
ppm/°C
−
2 000
−
Ω
−
−
100 µA
VCCO − 0.5 −
0
−
−20
−
5
−
−
12
−
14
−
−
VCCO V
0.5 V
+20 µA
−
ns
tbf ns
tbf ns
15 pF
10
−
−
MHz
2000 May 02
8
Share Link: 