STV0299B View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STV0299B

QPSK/BPSK LINK IC

STMicroelectronics 

STV0299B

For the “Unmodulated Tone Burst” Port CTRL 2 is

set to 0 and, only one byte, of value 00h is sent.

The parity bit is still 1, and as a result, the signal is

a continuous train of 12.5 ms. When the

modulation is active, the DiSEqC output is driven

Figure 5: Schematic showing Bit Transmission

Idle

11 Periods

11 Periods

alternatively to VDD and VSS levels. The DiSEqC

and Lock Control, DiSEqC FIFO and DiSEqC

Status Registers are in Addresses 08, 09 and

0Ah.

11 Periods

Next bit

Transmission of 1’s

Transmission of 0’s:

a) PortCtrl2 = 1

b) PortCtrl2 = 0

Table 3:

PortCtrl (1:0)

PortCtrl (2)

FIFO

Output

00

X

empty

0

01

X

empty

1

10

0

1

DATA = 00

DATA = FFor00

Unmodulated tone burst

Modulated tone burst

1

Note 1

DiSEqC signal

11

X

XX

Continuous tone

Note: 1 Byte to transfer in DiSEqC mode.

2 In mode PortCtrl (1:0)=10, the F22/DiSEqC pin returns to High -2 mode once the transmission is completed.

4.1.13 Standby Mode

A low power consumption mode (standby mode)

can be implemented (in this mode, fM_CLK = 0). In

standby mode, the I2C decoder still operates, but

with some restrictions (see Sections 4.1.4 and

4.1.5).

Standby mode can be initiated or stopped by I2C

bus commands as described in MCR Register 02.

At power-on, the circuit starts to operate in

standby mode when the STDBY pin (pin 42) is

tied to VDD. This guarantees low power

consumption for the stand-alone modules

(PCMCIA size front-end modules) before any

command is initiated. After the power-on

sequence, the standby mode is entirely controlled

via MCR Register (02).

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