IS61LP12836-166TQI View Datasheet(PDF) - Integrated Silicon Solution

Part Name

Description

Manufacturer

IS61LP12836-166TQI

128K x 32, 128K x 36 SYNCHRONOUS PIPELINED STATIC RAM

Integrated Silicon Solution 

IS61LP12832

IS61LP12836

ISSI ®

WRITE CYCLE TIMING

CLK

ADSP

ADSC

ADV

A16-A0

GW

BWE

BW4-BW1

CE

CE2

CE2

OE

DATAOUT

DATAIN

tKC

tKH

tKL

tSS

tSH

ADV must be inactive for ADSP Write tAVS

tAS

tAH

WR1

tWS

WR2

tWH

ADSP is blocked by CE inactive

ADSC initiate Write

tAVH

WR3

tWS

tWH

tCES

tWS

tWH

WR1

tCEH

tWS

tWH

WR2

CE Masks ADSP

WR3

tCES

tCES

tCEH

tCEH

CE2 and CE2 only sampled with ADSP or ADSC

High-Z

tDS

tDH BW4-BW1 only are applied to first cycle of WR2

High-Z

1a

2a

2b

2c

2d

3a

Unselected with CE2

Single Write

Burst Write

Write

Unselected

12

Integrated Silicon Solution, Inc. — 1-800-379-4774

PRELIMINARY INFORMATION Rev. 00B

09/25/01

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