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UPD4726GS-BAF View Datasheet(PDF) - NEC => Renesas Technology

Part Name
Description
Manufacturer
UPD4726GS-BAF
NEC
NEC => Renesas Technology NEC
UPD4726GS-BAF Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
BLOCK DIAGRAM/PIN CONFIGURATION (Top View)
+5 V
+10 V
+
C3
+
C1
1 VDD
2 C1+
3 VCC
4 C1-
5 N.C.
6 GND
7 N.C.
DIN1 8
DIN2 9
DIN3 10
DIN4 11
ROUT1 12
ROUT2 13
ROUT3 14
ROUT4 15
ROUT5 16
ROUT6 17
ROUT7 18
C4+ 36
GND 35
C4- 34
+
C4
+
C2
To internal
circuit
To internal
circuit
VSS 33
32 STBY
31 GND
30 EN
10 V
29 DOUT1
28 DOUT2
27 DOUT3
26 DOUT4
25 RIN1
24 RIN2
23 RIN3
22 RIN4
21 RIN5
20 RIN6
19 RIN7
µPD4726
Notes 1. VDD and VSS output internally boosted voltages. Do not connect a load directly to these pins.
2. It is recommended that capacitors having a breakdown voltage of 20 V or higher be used as C1 through
C5. Inserting a bypass capacitor of 0.1 to 1 µF in between VCC and GND is also recommended.
3. Be sure to connect all the GND pins. Especially, make sure that pin 31 is connected; otherwise, the
µPD4726 will not operate normally. Be sure to leave the NC pins (pins 5 and 7) open.
4. The pull-up resistors for DIN1 through DIN4 and STBY and the pull-down resistor for EN are active resistors.
2

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