MCM32A732SG33 View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

MCM32A732SG33

128KB/256KB Secondary Cache Module

Motorola => Freescale 

WRITE CYCLE 2 (E Controlled, See Notes 1 and 2)

Data

Tag/Valid

Dirty

Parameter

Symbol Min Max Min Max Min Max Unit Notes

Write Cycle Time

Address Setup Time

tAVAV 30 — 30 — 30 — ns

4

(A4 – A5) tAVEL 2 — — — — — ns

(A6 – A19)

10 — 2 — 10 —

Address Valid to End of Write

tAVEH 20 — 10 — 20 — ns

Write Pulse Width

tELEH, 15 — 10 — 15 — ns

tELWH

Data Setup to Write Time

tDVEH 8 — 6 — 8 — ns

Data Hold from Write Time

tEHDX 0 — 0 — 0 — ns

Write Recovery Time

tEHAX 0 — 0 — 0 — ns

NOTES:

1. A write occurs during the overlap of E low and W low.

2. E = Exx, ET; W = Wxx, WT, WA; G = GA, GB

3. All timings are referenced from the last valid address to the first transitioning address.

4. If E goes low coincident with or after W goes low, the output will remain in a high impedance state.

5. If E goes high coincident with or before W goes high, the output will remain in a high impedance state.

A (ADDRESS)

E (CHIP ENABLE)

W (WRITE ENABLE)

D (DATA IN)

WRITE CYCLE 2 (E Controlled, See Note 1)

tAVAV

tAVEH

tAVEL

tELEH

tELWH

tEHAX

tDVEH

DATA VALID

tEHDX

Q (DATA OUT)

HIGH–Z

MOTOROLA FAST SRAM

MCM32A732/764•MCM32A832/864•MCM32A932/964

9

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