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AT43312 View Datasheet(PDF) - Atmel Corporation

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AT43312 Datasheet PDF : 21 Pages
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Functional Description
The Atmel AT43312 is a USB hub controller for use in a
standalone hub, as well as an add-on hub for an existing
non-USB peripheral such as a PC display monitor or key-
board. In addition to supporting the standard USB hub
functionality, the AT43312 has additional features to
enhance the user friendliness of the hub.
USB Ports
The AT43312’s downstream ports are standard USB ports.
That is, their functionality complies to the USB specification
and any USB compliant device can be attached to these
ports without any other circuitry or modification. Each port
has a port connectivity status pin.
Dp And Dm Configuration
To match the full-speed cable impedance, 27 series
resistors must be connected between each port’s DM and
DP pins to their corresponding USB connector. In addition,
15 Kpull-down resistors are required at each down-
stream port’s DM and DP pins. Port0 is a full-speed port
and requires a 1.5 Kpull-up resistor to the 3.3V power
supply. This power supply must be derived from the bus
supplied power.
Port Status Pin
The STATx pins are signals that are not required by the
USB specification. Their function is to allow the hub to pro-
vide feedback to the user whenever a device is properly
connected to the port. A LED and series resistor connected
to STAx can be used to provide a visual feedback.
The default state of STATx is inactive. After a port is
enabled, AT43312 will assert the port’s STATx. Any condi-
tion that causes the port to be disabled inactivates STATx.
Hub Repeater
The Hub Repeater is responsible for port connectivity setup
and tear-down. It also supports exception handling such as
bus fault detection and recovery, and connect/disconnect
detection. Port0 is the root port and is connected to the root
hub or an upstream hub. When a packet is received at
Port0, the AT43312 propagates it to all of the enabled
downstream ports. Conversely, a packet from a down-
stream port is transmitted from Port0.
The AT43312 supports downstream port data signaling at
both 1.5 Mb/s and 12 Mb/s. Devices attached to the down-
stream ports are determined to be either full-speed or low-
speed depending on which data line (DP or DM) is pulled
high. If a port is enumerated as low speed, its output buff-
ers operate at a slew rate of 75-300 ns, and the AT43312
will not propagate any traffic to that port unless it is pref-
aced with a preamble PID. Low-speed data following the
preamble PID is propagated to both low and full-speed
devices. The AT43312 will enable low-speed drivers within
four full-speed bit times of the last bit of a preamble PID,
and will disable them at the end of an EOP. Packets out of
Port0 are always transmitted using the full-speed drivers.
All the AT43312 ports independently drive and monitor
their DP and DM pins so that they are able to detect and
generate the ‘J’, ‘K’, and SE0 bus signaling states. Each
hub port has single-ended and differential receivers on its
DP and DM lines. The ports I/O buffers comply to the volt-
age levels and drive requirements as specified in the USB
Specifications Rev 1.0.
The Hub Repeater implements a frame timer which is timed
by the 12MHz USB clock and gets reset every time a SOF
token is received from the Host.
Serial Interface Engine
The Serial Interface Engine handles the USB communica-
tion protocol. It performs the USB clock/data separation,
the NRZI data encoding/decoding, bit stuffing, CRC gener-
ation and checking, USB packet ID decoding and genera-
tion, and data serialization and de-serialization. The on-
chip phase locked loop generates the high-frequency clock
for the clock/data separation circuit.
Power Management
A hub is a high-powered device and is allowed to draw up
to 500 mA of current from the host or upstream hub. The
AT43312 chip itself and its external hub circuitry consume
less than 100 mA. The AT43312’s power management
logic work with external devices to detect overcurrent and
control power to the ports.
Overcurrent sensing is on a per port basis and is achieved
through the OVCx pins. Each of the OVCx pin is the plus
input of an analog comparator whose other input is con-
nected to a reference voltage source, VREF which is com-
mon to all four ports. Whenever the voltage at OVCx is less
than VREF, the AT43312 treats it as an overcurrent condi-
tion. This could be caused by an overload, or even a short
circuit, and causes the AT43312 to set the port’s
PORT_OVER_CURRENT status bit and its
C_PORT_OVER_CURRENT status change bit. At the
same time, power to the offending port is shut off.
An external device is needed to perform the actual switch-
ing of the ports’ power under control of the AT43312. The
signal to control the external switches are the PWRx pins
which are open drain signals and require external pull-up
resistors of 10 K. Any type of suitable switch or device is
acceptable. However, it should have a low-voltage drop
across it even when the port absorbs full power. In its sim-
plest form, this switch can be a P-channel MOSFET. The
advantages of using a MOSFET switch is its very low volt-
age drop and low cost.
Each one of the AT43312’s port has its own power control
pin which is asserted only when a
Set_Port_Feature[PORT-POWER] request is received
4
AT43312

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