AS1700-NPN View Datasheet(PDF) - Astec Semiconductor => Silicon Link

Part Name

Description

Manufacturer

AS1700-NPN

Semicustom Bipolar Array

Astec Semiconductor => Silicon Link 

AS17xx

Semicustom Bipolar Array

Non-Integratable Components

Identify all non-integratable components such

as inductors and capacitors. These will have to

be supplied with external components. Note that

junction capacitors can be formed using transis-

tors with collector and emitter tied together for

limited capacitance values.

Minimizing Stray Effects (Parasitics, Currents,

and Capacitance)

The following steps are recommended:

1) Try to keep substrate currents as low as

possible (under a few mA) to prevent isolation

loss and cross-talk between adjacent compo-

nents. If a component has a high substrate

current, try to isolate it from the other compo-

nents and keep it as close to the substrate

bonding pad as possible. The substrate cur-

rent should be measured for either each kit

part or the whole breadboard (with all the

substrates tied together) using a 10 Ω resistor

connected to the most negative potential in

the circuit.

2) Do not saturate any PNP. If this is unavoid-

able, limit the base current so that the sub-

strate current in the kit part lead is kept low.

This is because of the parasitic vertical PNP

formed between the emitter, base and sub-

strate in a lateral PNP will become active

when the lateral PNP is saturated.

3) Do not use any diode-connected PNP over

about 500 µA to avoid the above mentioned

parasitic PNP.

4) Contact the N-layer (collector-plug) in the

resistor-tubs to the most positive potential

(this is for resistor-tub biasing and isolation,

and is a concern only for the semicustom

implementation of the circuit), and the

substrate to the most negative potential in

the circuit.

5) High-frequency oscillations can, on rare oc-

casions, occur in the integrated circuit when

the breadboard did not show any tendency

toward oscillation. This can be caused by the

stray capacitances in the breadboard, which

are larger than those associated with the IC

and tend to stabilize potentially unstable cir-

cuits. Therefore, every effort should be made

to minimize stray capacitances in the bread-

board. This can be done by using DIP sockets

and soldered wire or printed circuit intercon-

nects rather than the popular solderless plug-

in breadboards which have up to 10 pF of

pin-to-pin capacitance.

Breadboarding with Kit Parts

All circuits should be breadboarded before being

implemented on the semicustom array using

AS1700 Kit Parts, (which are transistor arrays

made using the AS17xx semicustom array). This

breadboard will simulate as accurately as pos-

sible all stray effects and how the circuit will

perform when implemented with the semicustom

array. We recommend that standard carbon re-

sistors be used to simulate the integrated resis-

tors, or precision thin film resistors if accurate

ratios are required.

Evaluating your breadboard

After obtaining satisfactory performance from

the breadboard, evaluate the effects of resistor,

transistor and temperature variations.

We recommend simulating the worst-case resis-

tance variations (which is 30% globally and 1%

for matching and ratioing) on the breadboard by

substituting the appropriate values for all resis-

tors. Sensitivity to transistor parameter varia-

tions can be seen by interchanging kit parts.

We also recommend that the breadboard be

tested over the full operating temperature range

of the circuit.

ASTEC Semiconductor

128

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