DS1305EN-R View Datasheet(PDF) - Dallas Semiconductor -> Maxim Integrated
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DS1305EN-R Datasheet PDF : 22 Pages
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DS1305
RTC AND RAM ADDRESS MAP
The address map for the RTC and RAM registers of the DS1305 is shown in Figure 2. Data is written to
the RTC by writing to address locations 80h to 9Fh and is written to the RAM by writing to address
locations A0h to FFh. RTC data is read by reading address locations 00h to 1Fh and RAM data is read by
reading address locations 20h to 7Fh.
ADDRESS MAP Figure 2
00H
CLOCK/CALENDAR
1FH
READ ADDRESSES ONLY
20H
96-BYTES USER RAM
7FH
READ ADDRESSES ONLY
80H
CLOCK/CALENDAR
9FH
WRITE ADDRESSES ONLY
A0H
96-BYTES USER RAM
FFH
WRITE ADDRESSES ONLY
CLOCK, CALENDAR AND ALARM
The time and calendar information is obtained by reading the appropriate register bytes. The real time
clock registers are illustrated in Figure 3. The time, calendar and alarm are set or initialized by writing
the appropriate register bytes. Note that some bits are set to zero. These bits will always read 0
regardless of how they are written. Also note that registers 12h to 1Fh (read) and registers 92h to 9Fh are
reserved. These registers will always read 0 regardless of how they are written. The contents of the time,
calendar and alarm registers are in the binary-coded decimal (BCD) format.
Please note that the initial power on state of all registers in not defined. Therefore it is important to
enable the oscillator (EOSC = 0) and disable write protect (WP = 0) during initial configuration.
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