AK9813AF View Datasheet(PDF) - Asahi Kasei Microdevices

Part Name

Description

Manufacturer

AK9813AF

12ch 8bit D/A Converter with EEPROM

Asahi Kasei Microdevices 

ASAHI KASEI

[AK9813A]

Instruction Set

The AK9813A can be controlled for the following mode. The following mode is common to the LD I/F and the

CS IF. When LD I/F is selected, "A1" and "A0" are set by the external pins (EA0 pin and EA1 pin).

{1 DAC mode(External DI pin -> D/A converter)

[Õ:Don't Care]

A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Function

Õ Õ 0 0 D/A Channel Digital data for D/A

D/A output

{2 CALL mode(Internal EEPROM -> D/A converter)

[Õ:Don't Care]

A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Function

ADDRESS 1 0 D/A Channel Õ Õ Õ Õ Õ Õ Õ Õ READ

• The output of D/A converter is set by the data in the internal EEPROM.

{3 ALL CALL mode(Internal EEPROM -> D/A converter)

[Õ:Don't Care]

A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Function

ADDRESS 1 0 0 0 0 0 Õ Õ Õ Õ Õ Õ Õ Õ ALL CHANNEL READ

• The outputs of all D/A converters are set by the data in the internal EEPROM.

• • • Internal ECL function

{4 WRITE ENABLE mode(Internal EEPROM WRITE ENABLE)

[Õ:Don't Care]

A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Function

Õ Õ 1 1 0 0 0 0 Õ Õ Õ Õ Õ Õ Õ Õ WRITE ENABLE

• After WRITE ENABLE mode is executed, the programming to the internal EEPROM is enabled. Upon

power-up and after the execution of the ECL function, the AK9813A is in the programming disable state.

{5 WRITE DISABLE mode(Internal EEPROM WRITE DISABLE)

[Õ:Don't Care]

A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Function

Õ Õ 1 1 1 1 1 1 Õ Õ Õ Õ Õ Õ Õ Õ WRITE DISABLE

• After WRITE DISABLE mode is executed, the programming to the internal EEPROM is disabled.

{6 WRITE mode(External DI pin -> Internal EEPROM)

[Õ:Don't Care]

A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Function

ADDRESS 0 1 D/A Channel Digital data for D/A

WRITE

• The digital data for D/A (D0aD7) is written into the specified address in the internal EEPROM. The state

of the internal EEPROM must be the programming enable state.

{7 READ mode(Internal EEPROM -> External DO pin)

[Õ:Don't Care]

A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Function

ADDRESS 1 1 D/A Channel Õ Õ Õ Õ Õ Õ Õ Õ EEPROM DATA output

• The DO pin outputs the data in the internal EEPROM synchronously with the falling edge of of the input

pulse of the CLK pin.

DAD03E-00

-7-

1999/05

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