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MK3230-01STR View Datasheet(PDF) - Integrated Circuit Systems

Part Name
Description
Manufacturer
MK3230-01STR
ICST
Integrated Circuit Systems ICST
MK3230-01STR Datasheet PDF : 4 Pages
1 2 3 4
I CR O C LOC K
MK3230
Portable System Clock Synthesizer
Pin Assignment
CPU Clock Decoding
CPUS2 1
X2 2
X1 3
VDD32 4
VDD 5
GND 6
24M 7
32K 8
Pin Descriptions
16 CPUS1
15 CPUS0
14 CPUCLK
13 VDD
12 GND
11 14.3M
10 PD24+KBD
9 KBOUT
CPUS2 CPUS1 CPUS0 CPUCLK (MHz)
0
0
0
Off+14M off
0
0
1
80.00
0
1
0
25.00
0
1
1
66.66
1
0
0
20.00
1
0
1
50.00
1
1
0
33.33
1
1
1
4.00
Frequency transitions (except going to/from
off) will occur smoothly, and are compatible
with all 486 processors.
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
CPUS2
X2
X1
VDD32
VDD
GND
24M
32K
KBOUT
PD24+KBD
14.3M
GND
VDD
CPUCLK
CPUS0
CPUS1
Type
I
O
I
P
P
P
O
O
O
I
O
P
P
O
I
I
Description
Select 2 for CPUCLK frequencies. See Table above.
Crystal connection. Connect to 32.768 kHz crystal.
Crystal connection. Connect to 32.768 kHz crystal.
Separate power supply connection for 32.768kHz clock. Will operate to 2.0V.
Connect to +3.3V or +5V. Must be the same voltage as pin 13.
Connect to ground.
24 MHz floppy (or super I/O) clock output.
32.768 kHz square wave clock output.
Keyboard clock output. Either 12MHz (-01) or 16MHz (-02)
Power Down 24M+keyboard. Shuts off both clock outputs (pins 7,9) when low.
14.318 MHz system clock output. Do not drive a CRT PLL device with this output.
Connect to ground.
Connect to +3.3V or +5V. Must be the same voltage as pin 5.
CPUCLK output. See Table above.
Select 0 for CPUCLK frequencies. See Table above.
Select 1 for CPUCLK frequencies. See Table above.
Type: I = Input, O = output, P = power supply connection
Power Down status: Output clocks will stop in a low state when powered down
External Components
The MK3230 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.1µF should be connected between VDD and GND, and VDD32 and GND, as close to the
MK3230 as possible. A 10kseries resistor should be used to filter the VDD32 pin. A series termination
resistor of 33may be used for each clock output. The device does not require (nor do we recommend)
capacitors connected to the crystal pins. The 32.768 kHz crystal must be connected as close to the chip as
possible. See Application Brief MAB02 for a discussion on tuning for use on a real time clock (RTC).
MDS 3230 F
2
Revision 022798
Printed 11/16/00
Integrated Circuit Systems, Inc.•525 Race Street•San Jose•CA•95126•(408)295-9800tel•www.icst.com

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