PIC16C925 Datasheet PDF - Microchip Technology

PIC16C925 View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16C925

64/68-Pin CMOS Microcontrollers with LCD Driver

Microchip Technology

PIC16C925 Datasheet PDF : 182 Pages

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PIC16C925/926

2.3 Special Function Registers

The Special Function Registers (SFRs) are registers

used by the CPU and Peripheral Modules for control-

ling the desired operation of the device. These regis-

ters are implemented as static RAM.

The special function registers can be classified into two

sets, core and peripheral. Those registers associated

with the “core” functions are described in this section.

Those related to the operation of the peripheral

features are described in the section of that peripheral

feature.

TABLE 2-1: SPECIAL FUNCTION REGISTER SUMMARY

Address Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

Power-on

Reset

Details on

page

Bank 0

00h

INDF

01h

TMR0

02h

PCL

03h

STATUS

04h

FSR

05h

PORTA

06h

PORTB

07h

PORTC

08h

PORTD

09h

PORTE

0Ah

PCLATH

0Bh

INTCON

0Ch

PIR1

0Dh

—

0Eh

TMR1L

0Fh

TMR1H

10h

T1CON

11h

TMR2

12h

T2CON

13h

SSPBUF

14h

SSPCON

15h

CCPR1L

16h

CCPR1H

17h

CCP1CON

18h

—

19h

—

1Ah

—

1Bh

—

1Ch

—

1Dh

—

1Eh

ADRESH

Addressing this location uses contents of FSR to address data memory (not a physical register)

Timer0 Module Register

Program Counter (PC) Least Significant Byte

IRP

RP1

RP0

Indirect Data Memory Address Pointer

—

PORTA Data Latch when written: PORTA pins when read

PORTB Data Latch when written: PORTB pins when read

—

PORTC Data Latch when written: PORTC pins when read

PORTD Data Latch when written: PORTD pins when read

PORTE pins when read

—

Write Buffer for the upper 5 bits of the Program Counter

GIE

PEIE

TMR0IE

INTE

RBIE

TMR0IF

INTF

RBIF

LCDIF

ADIF

—

SSPIF CCP1IF TMR2IF TMR1IF

Unimplemented

Holding register for the Least Significant Byte of the 16-bit TMR1 Register

Holding register for the Most Significant Byte of the 16-bit TMR1 Register

—

T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON

Timer2 Module Register

—

TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0

Synchronous Serial Port Receive Buffer/Transmit Register

WCOL SSPOV SSPEN

CKP

SSPM3 SSPM2 SSPM1 SSPM0

Capture/Compare/PWM Register (LSB)

Capture/Compare/PWM Register (MSB)

—

CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0

Unimplemented

A/D Result Register High

0000 0000

xxxx xxxx

0000 0000

0001 1xxx

xxxx xxxx

--0x 0000

xxxx xxxx

--xx xxxx

0000 0000

---0 0000

0000 000x

00-- 0000

—

xxxx xxxx

--00 0000

0000 0000

-000 0000

xxxx xxxx

0000 0000

xxxx xxxx

--00 0000

—

xxxx xxxx

1Fh

ADCON0 ADCS1 ADCS0 CHS2

CHS1

CHS0 GO/DONE

—

Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0'.

Shaded locations are unimplemented, read as ‘0’.

Note 1: These pixels do not display, but can be used as general purpose RAM.

ADON 0000 0000

—

64, 72

—

80, 81

 2001 Microchip Technology Inc.

Preliminary

DS39544A-page 15

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