PM5361-EI View Datasheet(PDF) - PMC-Sierra

Part Name

Description

Manufacturer

PM5361-EI

SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR

PMC-Sierra 

PM5361 TUPP

DATA SHEET

PMC-920526

ISSUE 8

TRIBUTARY UNIT PAYLOAD PROCESSOR

LIST OF FIGURES

FIGURE 1 - SONET/SDH TRIBUTARY CROSS-CONNECT APPLICATION ..........................................5

FIGURE 2 - OVERALL DEVICE .............................................................................................................6

FIGURE 3 - EACH TRIBUTARY PAYLOAD PROCESSOR .....................................................................7

FIGURE 4 - SONET STS-3 CARRYING VT1.5 WITHIN STS-1 ...........................................................70

FIGURE 5 - SDH STM-1 CARRYING TU12 WITHIN VC3/AU3 ............................................................71

FIGURE 6 - SDH STM-1 CARRYING TU12 WITHIN TUG3/AU4..........................................................71

FIGURE 7 - SDH STM-1 CARRYING TU3 WITHIN TUG3 ...................................................................72

FIGURE 8 - SDH STM-1 CARRYING MIX OF TU11, TU12, TU3 WITHIN TUG3/AU4 .........................73

FIGURE 9 - INPUT BUS TIMING - SIMPLE STS-1/AU3 CASE ...........................................................74

FIGURE 10 - INPUT BUS TIMING - COMPLEX STS-1 / AU3 CASE .....................................................75

FIGURE 11 - INPUT BUS TIMING - AU4 CASE.....................................................................................76

FIGURE 12 - OUTPUT BUS TIMING - LOCKED STS-1 SPES / AU3 VCS CASE .................................77

FIGURE 13 - OUTPUT BUS TIMING - FLOATING STS-1 SPES / AU3 VCS CASE...............................78

FIGURE 14 - OUTPUT BUS TIMING - LOCKED AU4 VC CASE ...........................................................79

FIGURE 15 - OUTPUT BUS TIMING - FLOATING AU4 VC CASE.........................................................80

FIGURE 16 - BY-PASSED MODE FUNCTIONAL TIMING .....................................................................81

FIGURE 17 - MICROPROCESSOR INTERFACE READ TIMING (INTEL MODE) .................................86

FIGURE 18 - MICROPROCESSOR INTERFACE READ TIMING (MOTOROLA MODE) .......................87

FIGURE 19 - MICROPROCESSOR INTERFACE WRITE TIMING (INTEL MODE)................................89

FIGURE 20 - MICROPROCESSOR INTERFACE WRITE TIMING (MOTOROLA MODE)......................90

FIGURE 21 - INPUT TIMING..................................................................................................................93

FIGURE 22 - OUTPUT TIMING..............................................................................................................94

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE iv

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