VSC9116 View Datasheet(PDF) - Vitesse Semiconductor

Part Name

Description

Manufacturer

VSC9116

STS-192/STM-64 SONET/SDH Transport Overhead Terminating Transceiver

Vitesse Semiconductor 

VSC9116

STS-192/STM-64 SONET/SDH Transport Overhead

Terminating Transceiver

Overview

The VSC9116 is an STS-192/STM-64 SONET/SDH transport

overhead terminating transceiver. It may be used for combining four

STS-48/STM-16 data streams at the drop side interface into a single

STS-192/STM-64 data stream at the line side or passing through an

STS-192/STM-64 data stream. The primary functional blocks in the

VSC9116 include: an industrial compliant 16-bit, 622 MHz SONET-

/SDH line interface (OIFSF-4), SONET/SDH section/line generation

and termination of the STS-192/STM-64 line signal in compliance with

ANSI, Bellcore, and ITU specifications, 4x4 cross-connection of any

of the STS-48/STM-16 data streams in both transmit and receive

direction, enhanced buffer capabilities for de-skewing STS-48/STM-16

data streams, SONET/SDH section generation and termination of the

STS-48/STM-16 drop signals, four 4-bit (622 MHz mode) or 16-bit

(155 MHz mode) SONET/SDH drop interfaces, dedicated ports for

STS-192/STM-64 section/line overhead access of line interface data

stream, dedicated ports for STS-48/STM-16 section overhead access

of drop interface data streams, flexible synchronization of the STS-

48/STM-16 drop devices, enhanced bit error rate monitoring of STS-

192/STM-64 line signal, an 8-bit microprocessor interface with 8

general purpose I/O ports, JTAG TAP controller. When combined

with a high-speed mux/demux transceiver, this device provides a

complete solution for migrating STS-48/STM-16 to STS-192/STM-64

interfaces in SONET/SDH, ATM, or POS applications.

Features

• Integrated SONET/SDH

Transport Overhead Terminating

Transceiver for use in STS-

192/STM-64 Applications

• Performs Byte Interleaved

Multiplexing/Demultiplexing of

STS-48/STM-16 and Supports

STS-192/STM-64 Drop Side Data

Streams

• 16-bit LVDS Interface (622 MHz)

to High-speed MUX/DEMUX

Transceivers

• Support of both 4-bit (622 MHz)

and 16-bit (155 MHz) LVDS

Interface for Drop Side Data

Streams

• Generic 8-bit Microprocessor

Interface

• +2.5V/+3.3V Power Supply

• 0.25 Micron CMOS Technology

• JTAG TAP Controller Conforming

to the IEEE 1149.1 Standard

TLCLKOUT+/-

TLCLKOUTDIV+/-

TLOUT[15..0]+/-

TLPRTY+/-

TLFP+/-

SELTLCLKRATE

TLCLK+/-

TLSYNCLVDS+/-

TLSYNCTTL

TXRCLK

RXRCLK

RSTTXPLLB

RSTRXPLLB

CLKRSTEN

TLIF192

Clock

Generation

CLKGEN192

RLCLK+/-

RLIN[15..0]+/-

RLPRTY+/-

RLFP+/-

RLIF192

Transport Overhead Insertion

TOAP192

Section Generation

TSOP192

Line Generation

TLOP192

Section Trace

Buffer

SSTB192

Performance

Monitoring

BERM192

Section Termination

RSOP192

Line Termination

RLOP192

Transport Overhead Extraction

ROAP192

JTAG TAP

Byte

Interleaving

BIMX192

Frame Phase

Alignment

TFPA48

Internal Section

Port

TISP

Internal Section

Termination

TISOP48

TXCLK[A..D]+/-

TXDAT[A..D][15..0]+/-

TXFP[A..D]+/-

TXPRTY[A..D]+/-

Transmit Sync

Control

TSC

Byte

Interleaving

BIDX192

CPU

Drop Channel

Sync Control

TDCSC

Internal Section

Generation

RISOP48

Internal Section

Port

RISP

TDIF192

TXSYNC/TXRST[A..D]+/-

TXCLKOUT[A..D]+/-

RDIF192

RXCLK155[A..D]+/-

RXCLK622[A..D]+/-

RXDAT[A..D][15..0]+/-

RXFP[A..D]+/-

RXPRTY[A..D]+/-

VSC9116 Block Diagram

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