VSC9112 View Datasheet(PDF) - Vitesse Semiconductor

Part Name

Description

Manufacturer

VSC9112

STS-48c Physical Layer Packet/ATM Over SONET/SDH Device

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

STS-48c Physical Layer

Packet/ATM Over SONET/SDH Device

AC Characteristics

Figure 1: Rx Line Interface Timing Dependencies

RLCLK+

RLIN[15..0]+/-

RLPRTY+/-

RLFP+/-

RXRCLK

TSU,RLIN

TH,RLIN

TP,RXRCLK

Datasheet

VSC9112

Table 1: Rx Line Interface

Symbol

Description

Min Max Unit

fRLCLK

dcRLCLK

TR/F, RLCLK

TSU, RLIN

RLCLK+/- Clock Frequency (nominal)

-

155.52 MHz

RLCLK+/- Duty Cycle

40

60

%

RLCLK+/- Rise/Fall Time

-

1.0

ns

RLIN[15..0]+/-, RLPRTY+/-, RLFP+/- Setup Time to RLCLK+

Rising Edge

1.5

-

ns

TH, RLIN

RLIN[15..0]+/-, RLPRTY+/-, RLFP+/- Hold Time to RLCLK+

Rising Edge

1.0

-

ns

TP, RXRCLK

RLCLK+ Rising Edge to RXRCLK Rising/Falling Edge

fRXRCLK

fRLCLK Divided by 2/4/8/19440

dcRXRCLK

RXRCLK Duty Cycle

RXRCLK times are for 50 pF load.

1.0

20.0

ns

-

-

MHz

30

70

%

Page 10

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

G52210-0, Rev. 4.3

3/30/00

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