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CXD2452R View Datasheet(PDF) - Sony Semiconductor

Part Name
Description
Manufacturer
CXD2452R Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CXD2452R
6) FRI and HRI loading characteristics
FRI, HRI
MCK
0.8VDDd
0.8VDDd
ts5
th5
0.8VDDd
MCK load capacitance = 10pF
(Within the recommended operating conditions)
Symbol
Definition
Miin. Typ. Min. Unit
ts5
FRI and HRI setup time, activated by the rising edge of MCK 10
ns
th5
FRI and HRI hold time, activated by the rising edge of MCK
0
ns
7) Output timing characteristics using DSGAT
DSGAT
H1, H2, RG, XV1, XV2, XV3, XSUB, XSG1, XSG2,
XSHP, XSHD, XRS, PBLK, XCLPDM, XCLPOB, CLD
0.2VDDd
tpDSGAT
0.2VDDd
H1 and H2 load capacitance = 100pF, RG load capacitance = 20pF, XV1, XV2, XV3, XSG1, XSG2, XSUB,
XSHP, XSHD, XRS, PBLK, XCLPDM, XCLPOB and CLD load capacitance = 10pF
(Within the recommended operating conditions)
Symbol
Definition
tpDSGAT Time until the above outputs go low after the fall of DSGAT
Min. Typ. Max. Unit
100 ns
8) Output variation characteristics
MCK
WEN, ID
0.8VDDd
tpd2
WEN and ID load capacitance = 10pF
(Within the recommended operating conditions)
Symbol
tpd2
Definition
Time until the above outputs change after the rise of MCK
Miin. Typ. Min. Unit
20
40 ns
–9–

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