LR38574 View Datasheet(PDF) - Sharp Electronics

Part Name

Description

Manufacturer

LR38574

Timing Generator IC for 1 090 k/1 310 k-pixel CCDs

Sharp Electronics 

LR38574

Serial Data Control

SERIAL DATA INPUT TIMING

ED0

ED1

ED2

D00 D01 D02 D03 D04 D05 D06 D07 D08 D09 D10 D11 ... D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31

The data is shifted at the rising edge of ED1, and is

latched at the rising edge of ED0.

PWSA is effective at the rising edge of ED0, but

others are effective at the horizontal line in which

VH1AX to VH3BX are active.

ED0 should be low level during data inputs of ED1

and ED2.

As all internal data are set to low level by ACLX or

PWSA, ED0 to ED1 should be input for desirable

operations.

As all internal data except PWSA are set to low

level by PWSA, ED0 to ED1 should be input for

desirable operations.

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