AD6644ST/PCBZ View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD6644ST/PCBZ Datasheet PDF : 24 Pages
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Jitter Considerations
The signal-to-noise ratio (SNR) for an ADC can be predicted.
When normalized to ADC codes, Equation 1 accurately
predicts the SNR based on three terms. These are jitter, average
DNL error, and thermal noise. Each of these terms contributes
to the noise within the converter (see Equation 1).
( ) SNR
=
−20 ×
log
⎢⎣⎡⎜⎝⎛
1+ε
2n
⎟⎠⎞ 2
+
2π ×
f ANALOG
× t j rms
2+
⎜⎜⎝⎛
V NOISE
2n
rms
⎟⎟⎠⎞2
⎤1/2
⎥
⎥⎦
(1)
where:
fANALOG is the analog input frequency.
tj rms is the rms jitter of the encode (rms sum of encode source
and internal encode circuitry).
ε is the average DNL of the ADC (typically 0.41 LSB).
n is the number of bits in the ADC.
VNOISE rms is the V rms thermal noise referred to the analog input
of the ADC (typically 2.5 LSB).
AD6644
For a 14-bit ADC like the AD6644, aperture jitter can greatly
affect the SNR performance as the analog frequency is
increased. Figure 31 shows a family of curves that demonstrates
the expected SNR performance of the AD6644 as jitter increases
and is derived from Equation 1.
For a complete review of aperture jitter, see Application Note
AN-756, Sampled Systems and the Effects of Clock Phase Noise
and Jitter, at www.analog.com.
80
AIN = 30MHz
75
AIN = 70MHz
70
AIN = 110MHz
65
AIN = 150MHz
60
AIN = 190MHz
55
0
0.1
0.2
0.3
0.4
0.5
0.6
JITTER (ps)
Figure 31. SNR vs. Jitter
Rev. D | Page 17 of 24
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