AD6644 View Datasheet(PDF) - Analog Devices
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Description
Manufacturer
AD6644 Datasheet PDF : 24 Pages
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AD6644
DIGITAL SPECIFICATIONS
AVCC = 5 V, DVCC = 3.3 V; TMIN = −25°C, TMAX = +85°C, unless otherwise noted.
Table 2.
Parameter
ENCODE INPUTS (ENCODE, ENCODE)
Differential Input Voltage2
Differential Input Resistance
Differential Input Capacitance
LOGIC OUTPUTS (D13 to D0, DRY, OVR)
Logic Compatibility
Logic 1 Voltage3
Logic 0 Voltage3
Output Coding
DMID
Temp
Test Level1
AD6644AST-40
AD6644AST-65
Min Typ
Max Min Typ
Max Unit
Full
IV
25°C
V
25°C
V
0.4
10
2.5
0.4
10
2.5
V p-p
kΩ
pF
Full
V
Full
V
Full
V
CMOS
2.5
0.4
Twos complement
DVCC/2
CMOS
2.5
V
0.4
V
Twos complement
DVCC/2
V
1 See the Explanation of Test Levels section.
2 All ac specifications tested by driving ENCODE and ENCODE differentially. Reference Figure 18 for performance vs. encode power.
3 Digital output logic levels: DVCC = 3.3 V, CLOAD = 10 pF. Capacitive loads >10 pF degrade performance.
SWITCHING SPECIFICATIONS
AVCC = 5 V, DVCC = 3.3 V; ENCODE and ENCODE = maximum conversion rate MSPS; TMIN = –25°C, TMAX = +85°C, unless otherwise noted.
Table 3.
Parameter
Maximum Conversion Rate
Minimum Conversion Rate
ENCODE Pulse Width High
ENCODE Pulse Width Low
Temp
Full
Full
Full
Full
Test Level1
II
IV
IV
IV
AD6644AST-40
Min Typ Max
40
15
10
10
AD6644AST-65
Min Typ Max
65
15
6.5
6.5
Unit
MSPS
MSPS
ns
ns
1 See the Explanation of Test Levels section.
AVCC = 5 V, DVCC = 3.3 V; ENCODE and ENCODE = maximum conversion rate MSPS; TMIN = −25°C, TMAX = +85°C, CLOAD = 10 Pf,
unless otherwise noted.
Table 4.
Parameter
ENCODE INPUT PARAMETERS2
Encode Period @ 65 MSPS
Encode Period @ 40 MSPS
Encode Pulse Width High3 @ 65 MSPS
Encode Pulse Width Low @ 65 MSPS
ENCODE/DATA READY
Encode Rising to Data Ready Falling
Encode Rising to Data Ready Rising
@ 65 MSPS (50% Duty Cycle)
@ 40 MSPS (50% Duty Cycle)
ENCODE/DATA (D13:0), OVR
ENCODE to DATA Falling Low
ENCODE to DATA Rising Low
ENCODE to DATA Delay (Hold Time)4
ENCODE to DATA Delay (Setup Time)5
Encode = 65 MSPS (50% Duty Cycle)
Encode = 40 MSPS (50% Duty Cycle)
Name
tENC
tENC
tENCH
tENCL
tDR
tE_DR
tE_FL
tE_RL
tH_E
tS_E
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Test Level1
V
V
IV
IV
IV
IV
IV
IV
IV
IV
IV
IV
AD6644AST-40/65
Min
Typ
Max Unit
15.4
ns
25
ns
6.2
7.7
9.2
ns
6.2
7.7
9.2
ns
2.6
3.4
4.6
ns
tENCH + tDR
10.3
11.1
12.3 ns
15.1
15.9
17.1 ns
3.8
5.5
9.2
ns
3.0
4.3
6.4
ns
3.0
4.3
6.4
ns
tENC − tE_FL
6.2
9.8
11.6 ns
15.9
19.4
21.2 ns
Rev. D | Page 4 of 24
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