BT864A View Datasheet(PDF) - Conexant Systems

Part Name

Description

Manufacturer

BT864A

YCrCb to NTSC/PAL Digital Video Encoder

Conexant Systems 

1

1.0 Circuit Description

1.1 Pin Descriptions

Pin names, input/output assignments, numbers, and descriptions are listed in

Table 1-1. Figure 1-1 illustrates the Bt864A/865A pinout diagram, and Figure 1-2

details the block diagram.

Table 1-1. Pin Assignments (1 of 3)

Pin Name

I/O

Pin #

CLK

I 43

RESET*

I 47

BLANK*

I 48

VSYNC*

I/O 49

HSYNC*

I/O 50

P[7:0]

I 35–28

Y[7:0]

I 25, 24, 21–16

TTXDAT

TTXREQ

ALTADDR

I 27

O 38

I 26

Description

2x pixel clock input (TTL compatible).

Reset control input (TTL compatible). A logical zero disables and resets video

timing (horizontal, vertical, subcarrier counters to the start of VSYNC of first

field) and resets the I2C interface (but does not reset I2C registers). RESET*

must be a logical one for normal operation.

Composite blanking control input (TTL compatible). BLANK* is registered on

the rising edge of CLK. The P[7:0] and Y[7:0] inputs are ignored while BLANK*

is a logical zero.

Vertical sync input/output (TTL compatible). As an output (master mode

operation), VSYNC* is output following the rising edge of CLK. As an input

(slave mode operation), VSYNC* is registered on the rising edge of CLK.

Horizontal sync input/output (TTL compatible). As an output (master mode

operation), HSYNC* is output following the rising edge of CLK. As an input

(slave mode operation), HSYNC* is registered on the rising edge of CLK.

YCrCb pixel inputs (TTL compatible) in 8-bit YCrCb mode. CrCb pixel inputs

(TTL compatible) in 16-bit YCrCb mode. A higher index corresponds to a greater

bit significance.

Y pixel inputs (TTL compatible) in 16-bit YCrCb mode. Y[7] enables internal

color bars when operating in 8-bit YCrCb mode. A higher index corresponds to a

greater bit significance.(1)

Teletext bit stream input (TTL compatible).(1)

Teletext request output (TTL compatible).

Alternate slave address input (TTL compatible). A logical one configures the

device to respond to an I2C address of 0x88; a logical zero configures the device

to respond to an I2C address of 0x8A.(1)

100138B

Conexant

1-1

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