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AD9601BCPZ-250 View Datasheet(PDF) - Analog Devices

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Description
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AD9601BCPZ-250 Datasheet PDF : 32 Pages
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AD9601
DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, TMIN = −40°C, TMAX = +85°C, fIN = −1.0 dBFS, full scale = 1.25 V, DCS enabled, unless otherwise noted.
Table 3.
Parameter1
CLOCK INPUTS
Logic Compliance
Internal Common-Mode Bias
Differential Input Voltage
Input Voltage Range
Input Common-Mode Range
High Level Input Voltage (VIH)
Low Level Input Voltage (VIL)
Input Resistance (Differential)
Input Capacitance
LOGIC INPUTS
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Input Current (SDIO)
Logic 0 Input Current (SDIO)
Logic 1 Input Current
(SCLK, PDWN, CSB, RESET)
Logic 0 Input Current
(SCLK, PDWN, CSB, RESET)
Input Capacitance
LOGIC OUTPUTS
High Level Output Voltage
Low Level Output Voltage
Output Coding
AD9601-200
AD9601-250
Temp Min
Typ Max
Min
Typ Max
Unit
Full
CMOS/LVDS/LVPECL
CMOS/LVDS/LVPECL
Full
1.2
1.2
V
Full 0.2
6
0.2
6
V p-p
Full AVDD − 0.3
AVDD + 1.6 AVDD − 0.3
AVDD + 1.6 V
Full 1.1
AVDD
1.1
AVDD
V
Full 1.2
3.6
1.2
3.6
V
Full 0
0.8
0
0.8
V
Full 16
20 24
16
20 24
Full
4
4
pF
Full 0.8 × VDD
Full
Full
Full
Full
Full
25°C
0.2 × AVDD
0
−60
55
0
4
0.8 × VDD
V
0.2 × AVDD V
0
μA
−60
μA
50
μA
0
μA
4
pF
Full DRVDD − 0.05
DRVDD − 0.05
V
Full
GND + 0.05
GND + 0.05
V
Twos complement, Gray code, or offset binary (default)
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed.
Rev. 0 | Page 5 of 32

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