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ATTINY43U View Datasheet(PDF) - Atmel Corporation

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ATTINY43U Datasheet PDF : 210 Pages
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ATtiny43U
5. Memories
This section describes the different memories in ATtiny43U. The AVR architecture has two main
memory spaces, the Data memory and the Program memory space. In addition, the ATtiny43U
features an EEPROM Memory for data storage. All three memory spaces are linear and regular.
5.1 In-System Re-programmable Flash Program Memory
The ATtiny43U contains 4K byte On-chip In-System Reprogrammable Flash memory for pro-
gram storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as 2048 x
16.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATtiny43U Pro-
gram Counter (PC) is 11 bits wide, thus addressing the 2048 Program memory locations.
“Memory Programming” on page 141 contains a detailed description on Flash data downloading.
Constant tables can be allocated within the entire Program memory address space (see the
LPM – Load Program memory instruction description).
Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-
ing” on page 12.
Figure 5-1.
Program Memory Map
Program Memory
0x0000
0x07FF
5.2 SRAM Data Memory
Figure 5-2 on page 16 shows how the ATtiny43U SRAM Memory is organized.
The low Data memory locations address both the Register File, the I/O memory and the internal
data SRAM, as follows:
• The first 32 locations address the Register File
• The next 64 locations address the standard I/O memory
• The last 256 locations address the internal data SRAM
The five different addressing modes for the Data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register
File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
15
8048C–AVR–02/12

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